#TITLE	"Initialization for the NEC-APC"
	#SUBTTL	"Copyright (c) 1984 Multi Micro Corp."
	#PAGE	132,66
;
;	NITAPC.A
;	Written by: John Lauber
;
	MODULE	"NITAPC"		; module ID
;
	#INCLUDE "DREQUATE"		; common driver equivalences
	#INCLUDE "APCEQU"		; common APC equivalences
;
; This module contains all the default NEC-APC system initialization
; and the interrupt structure.  All software devices should be reset 
; and cleared in this module.
;
; Additional standard TurboDOS modules are called to initialize from
; this module.
;
;	"INTENA" - Global routine.
;	On entry: AL = Valid vector level number on PIC's, (0-14)
;		  DX = ISR offset address.
;
;	"CLRMSK" - Clear PIC vector mask.
;	  -or-
;	"SETMSK" - Set PIC vector mask.
;	  -or-
;	"SIGEOI" - Signal specific EOI.
;	On entry: AL = Valid vector level number on PIC's, (0-14)
;
;
MICVEC	==	32			; master UIC base assignment
SICVEC	==	40			; slave UIC base assignment
;
	LOC	0			; interrupt page layout
;
INTSEG:
;
	RES	4*MICVEC
;
IRBASE:					; IR0-14 base (base UIC VI addr)
;
;
	LOC	Code#			; locate in code segment
;
HDWNIT::				; TurboDOS called entry
;
; Initialize Interrupt Controllers.
;
	MOV	AL,=0X11		; edge trig'red, cascade, ICW4
	OUT	MIC_P0,AL		; ICW1
	MOV	AL,=MICVEC		; vector address (T7-T3)
	OUT	MIC_P1,AL		; ICW2
	MOV	AL,=0X80		; IREQ-7 has a slave
	OUT	MIC_P1,AL		; ICW3
	MOV	AL,=0X01		; Normal EOI, 8086 mode
	OUT	MIC_P1,AL		; ICW4
	MOV	AL,=0XFF		; mask all IREQ's
	OUT	MIC_P1,AL		; OCW1
;
	MOV	AL,=0X11		; edge trig'red, cascade, ICW4
	OUT	SIC_P0,AL		; ICW1
	MOV	AL,=SICVEC		; vector address (T7-T3)
	OUT	SIC_P1,AL		; ICW2
	MOV	AL,=0X07		; Slave ID number
	OUT	SIC_P1,AL		; ICW3
	MOV	AL,=0X01		; Slave, Normal EOI, 8086 mode
	OUT	SIC_P1,AL		; ICW4
	MOV	AL,=0XFF		; mask all IREQ's
	OUT	SIC_P1,AL		; OCW1
;
; Init all vectors to dummy ISR offset.
;
	PUSH	DS			; save data segment
	MOV	AX,=INTSEG		; get interrupt seg
	MOV	DS,AX			; select base seg
	XOR	BX,BX			; clear base offset
	MOV	CX,=256			; get count
__IL:	MOV	[BX],WORD &DMYISR	; load dummy ISR offset
	INC	BX
	INC	BX			; advance pointer
	MOV	[BX],CS			; and our code seg
	INC	BX
	INC	BX			; advance pointer
	LOOP	__IL			; continue for the count
	POP	DS			; restore data segment
;
; Allow other modules to initialize.
;
	CALL	CONNIT#			; console initialization
	CALL	RTCNIT#			; RTC initialization
	CALL	SPINIT#			; serial/parallel init
;
	CALL	DSKINA#			; disk driver A
	CALL	DSKINB#			; disk driver B
	CALL	DSKINC#			; disk driver C
	CALL	DSKIND#			; disk driver D
;
	CALL	CKTINA#			; network driver A
	CALL	CKTINB#			; network driver B
	CALL	CKTINC#			; network driver C
	CALL	CKTIND#			; network driver D
;
	RET				; all done, so exit
;
;
; Enable 8259 IREQ's.  AL=IREQ number (0-15), DX=ISR offset.
;
INTENA::
	MOV	BL,AL			; prep vector reg
	CMP	BL,=6			; IR0-6 on master?
	JBE	__C1			; if so, continue
	CMP	BL,=14			; valid IREQ?
	JA	__X			; if not, skip and exit
	INC	BL			; adjust vector for slave
__C1:	PUSH	AX			; save vector
	PUSH	DS			; save data seg
	MOV	AX,=INTSEG
	MOV	DS,AX			; select base page
	XOR	BH,BH			; make vector double length
	ADD	BX,BX			; times 2
	ADD	BX,BX			; times 4 for vector base
	MOV	IRBASE+0[BX],DX		; store offset
	MOV	IRBASE+2[BX],CS		; and segment
	POP	DS			; restore data seg
	POP	AX			; restore vector
	CALL	CLRMSK			; and clear the mask
__X:	RET				; exit
;	
;
; Clear interrupt mask bit. AL=IREQ number (0-14).
;
CLRMSK::
	XOR	AH,AH			; flags = clear operation
	JMPS	MSKCOM			; and join common
;
; Set interrupt mask bit. AL=IREQ number (0-14).
;
SETMSK::
	OR	AH,=0XFF		; flag = set operation
;
MSKCOM:	MOV	CL,AL			; prep reg
	MOV	DX,=MIC_P1		; assume master IC port first
	CMP	CL,=6			; IR0-6?
	JBE	__C1			; if so, continue
	CMP	CL,=14			; valid IR?
	JA	__X			; if not, exit
	SUB	CL,=7			; adjust for IR7=14
	MOV	DX,=SIC_P1		; load slave IC port
__C1:	MOV	BL,=1			; init a bit
	SHL	BL,CL			; calc bit position
	PUSHF				; save machine status
	CLI				; and disable interrupts
	IN	AL,DX			; read current device mask
	TEST	AH,AH			; set or clear?
	JNZ	__S			; if set, continue
	NOT	BL			; invert logic
	AND	AL,BL			; and clear IMSK bit
	JMPS	__C2			; and continue
__S:	OR	AL,BL			; set IMSK bit
__C2:	OUT	DX,AL			; and send back to device
	POPF				; restore status
__X:	RET				; and exit
;
;
; Signal EOI for specific IREQ.  AL=IREQ number (0-14)
;
SIGEOI::
	MOV	DX,=MIC_P0		; assume master IC port
	CMP	AL,=6			; IR0-6?
	JBE	__C1			; if so, continue
	CMP	AL,=14			; valid IR?
	JA	__X			; if not, exit
	SUB	AL,=7			; adjust number
	MOV	DX,=SIC_P0		; and select slave IC port
__C1:	OR	AL,=0X60		; combine command bits
	OUT	DX,AL			; signal specific EOI
__X:	RET				; and exit
;
;
DMYISR:	IRET				; dummy interrupt service routine
;
	END