page

;	CompuPro System Support 1 equates.

GBSS:	EQU	50h		;System Support starting port
GBMP0:	EQU	GBSS+0		;Master PIC port 0
GBMP1:	EQU	GBSS+1		;Master PIC port 1
GBSP0:	EQU	GBSS+2		;Slave PIC port 0
GBSP1:	EQU	GBSS+3		;Slave PIC port 1
GBT0:	EQU	GBSS+4		;Timer number 0
GBT1:	EQU	GBSS+5		;Timer number 1
GBT2:	EQU	GBSS+6		;Timer number 2
GBTC:	EQU	GBSS+7		;Timer control port
GBFPPD:	EQU	GBSS+8		;Floating point processor data port
GBFPPC:	EQU	GBSS+9		;Floating point processor command port
GBCLKC:	EQU	GBSS+10		;Clock command port
GBCLKD:	EQU	GBSS+11		;Clock data port
GBUD:	EQU	GBSS+12		;Uart data port
GBUS:	EQU	GBSS+13		;Uart status port
GBUM:	EQU	GBSS+14		;Uart modem port
GBUC:	EQU	GBSS+15		;Uart command port

SSDAV:	EQU	0000_0010b	;System Support Data Available
SSTBMT:	EQU	0000_0001b	;System Support Transmit Buffer Empty

GB8130:	EQU	0FFF0H		;Base of 80130 on CPU 8086/87
GBICW1:	EQU	GB8130		;Icw1 
GBICW2:	EQU	GB8130+2	;Icw2
	page
;	C O N S O L   I N I T I A L I Z A T I O N
;
;	This routine performs the initialization required by
;	the System Support UART.
	if	@ldr
sTINIT:
	LD	BX,#BAUDS	;Point to initialization table
	LD	AL,[BX+1]	;Get mode register 1 byte
	outb	gbum,al		;Set up mode register 1
	ld	al,[bx+2]	;Get mode register 2 byte
	outb	gbum,al		;Set up mode register 2
	ld	al,[bx+3]	;Get command byte
	outb	gbuc,al		;Set up command byte
	ret
;	
;	Initialize the 8259a Interupt controllers to a known state.
;	All interupts will be masked off, base is 40h (same as MP/M 816) 
;
sINTDIS:
	LD	BX,#DISINT
	LD	CX,#LDISINT
	LD	DH,#0
DISLOP:	LD	AL,[BX]
	INC 	BX	
	LD	DL,[BX]
	INC	BX
	OUTB	DX,AL
	LOOP	DISLOP
	LD	CX,#L80130L
DIS2LOP:
	LD	DX,[BX]
	INC BX ! INC BX
	LD	AL,[BX]
	INC 	BX 
	OUT	DX,AL
	LOOP	DIS2LOP
	RET
;
DISINT:
	DB	0001_1101b		;Level, cascade, icw4
	DB	gbmp0
	DB	40h			;Base address of interupt vectors
	DB	gbmp1
	DB	1000_0000b		;IR7 has slave
	DB	gbmp1
	DB	0001_0001b		;Special fully nested, 8088
	DB	gbmp1
	DB	07Fh		;mask all interupts, but slave
	DB	gbmp1
	DB	0001_1101b		;Level, cascade, icw4
	DB	gbsp0
	DB	40h+8  		;Base address of interput vectors
	DB	gbsp1
	DB	0000_0111b		;Slave #7
	DB	gbsp1
	DB	0000_0001b		;8088 mode
	DB	gbsp1
	DB	0FFh		;mask all registers
	DB	gbsp1
LDISINT	EQU	$ - DISINT
;also
;disable 80130 interrupts on CPU 8086/87 if present
I80130:
	DW	gbicw1		;Must use dx for 16 bit I/O port
	DB	31H
	DW	gbicw2
	DB	80h		;icw2
	DW	gbicw2
	DB	0FFh		;icw3 (tell it all IRs are slaves)
	DW	gbicw2
	DB	0Dh		;icw4
	DW	gbicw2
	DB	00		;icw6 (all IRs are non-local)
	DW	gbicw2
	DB	0FFH	;Mask off all interrupts
L80130	EQU	$ - I80130
	endif
	space	4,10
;	C O N S O L   S T A T U S
;
;	This routine samples the Console status and returns the
;	following values in the A register.
;
;	EXIT	A = 0 (zero), means no character
;		currently ready to read.
;
;		A = FFh (255), means character
;		currently ready to read.

sCONST:
	if	@ldr <> 4
	INB	GBUS		;Input from port
	AND	AL,# SSDAV	;Mask data available
	JZ	sCNST1		;If data not available
	OR	AL,# 0FFH
sCNST1:
	endif
	RET
	space	4,10
;	C O N S O L   I N P U T
;
;	Read the next character into the A register, clearing
;	the high order bit.  If no character currently ready to
;	read then wait for a character to arrive before returning.
;
;	EXIT	A = character read from terminal.

sCONIN:
	if	@ldr <> 4
	INB	GBUS		;Get status from uart
	AND	AL,# SSDAV
	JZ	sCONIN
	INB	GBUD
	AND	AL,# 7Fh
	endif
	RET
	space	4,10
;	C O N S O L   O U T P U T
;
;	Send a character to the console.  If the console
;	is not ready to receive a character wait until
;	the console is ready.
;
;	ENTRY	CL = ASCII character to output to console.

sCONOUT:
	INB	GBUS		;Get uart status
	AND	AL,# SSTBMT		;Test if buffer empty
	JZ	sCONOUT
	MOV	AL,CL
	OUTB	GBUD
	RET
	space	4,10