APPLICATION NOTE: 1 SUBJECT HDC/DM operatio wit Nort Sta 32ˠ an HRAM dynamic memory boards. PRODUCT: HDC/DMA Controller DATE: May 12, 1982 BACKGROUND: Th HDC/DM controlle generate memor rea cycle i accordanc wit th IEE 69 standard fo th S-10 bus Thes standard stat tha th statu line (SW an SMEM i particular ar fo decodin o statu an ar no t b use a strobe t begi memor cycles Sinc th HDC/DM i eithe readin fro o writin t th bu (bu no both durin dat transfers i i no necessar fo i t chang th statu line betwee eac bu cycle. Memor board whic compl wit th IEE 69 tak thi int accoun an therefor us onl th strobe (pDBI o /pWR t initiat memor cycle Som olde desig dynami memor board (i fac goo dea o them us th risin edg o sMEMҠ t begi memor cycle Thi wil caus proble sinc th HDC/DM maintain leve o thi line Fortunatel ther i relativel simpl solutio t thi problem. .pa MODIFICATIONS: B addin wai stat o al DM read b th HDC/DM controller th signa pDBI wil b lengthene t allo longe acces tim fo dynami memor boards Ther i on dis-advantag t thi approac i tha i increase th minimu syste cloc spee fo DM dat transfer fro 2. Mh t 3. Mhz Thi wai stat ca b adde simpl b changin th PA (16R8 a locatio 3Ġ o th HDC/DM fro 3D-Ġ t on wit th堠 3D-NORTH designation I i the necessar t jumpe th dynami memor boar t us th strob pDBI rathe tha sMEMҠ fo initiatin memor rea cycles Agai thi i relativel simpl mo. Fo NORT STA 32 memor boards: 1 Remov chi locate a 4 o th NORT STA 3 memor board (74LS02). 2 Usin shor piec o 3 g jumpe wire connec pi of 4C to pin 8 of 4C. 3 Ben o cu pi o 4 s i doe no mak contac wit th socke an re-inser chi bac int it socket. Th memor boar wil no functio wit NORT STA product a well as DM board conformin t th IEEE 696 standard For NORTH STAR HRAM memory boards: Ther i n hardwar modificatio require o HRA board a the us th pDBI signal Simpl remov I 3D- o th HDC/DM boar an replac i wit chi wit designatio 3D-NORTH* Th board wil no b compatible