subttl	'(c) 1980 Morrow Designs'
	title   'WBDMA  FIRMWARE Revision 0'

;****************************************************************
;*								*
;*     WBDMA firmware, for the Morrow Designs / Thinker		*
;*     Toys Decision One computer.				*
;*								*
;*             Bob Groppo  09/08/81				*
;*								*
;****************************************************************
	
	.z80
	aseg

;****************************************************************
;*								*
;*		UART read register constants:	      	        *
;*								*
;****************************************************************

rbr	equ	00h		;receiver buffer register
iir	equ	02h		;interrupt idntification register
lsr	equ	05h		;line status register


;****************************************************************
;*								*
;*		UART read/write register constants:		*
;*								*
;****************************************************************

consol	equ	0		;Port number of the console (0-2)

thr	equ	00h		;transmitter holding register
ier	equ	01h		;interrupt enable register
lcr	equ	03h		;line control register
mcr	equ	04h		;modem control register
dll	equ	00h		;divisor latch low bits
dlm	equ	01h		;divisor latch high bits
b110	equ	1047
b300	equ	384
b1200	equ	96
b9600	equ	12
b19200	equ	06

;****************************************************************
;*								*
;*		UART data constants:				*
;*								*
;****************************************************************

;	Line status register constants

dr	equ	01h		;received character available
or	equ	02h		;overun error
pe	equ	04h		;overun error
fe	equ	08h		;framing error
brki	equ	010h		;break detected
thre	equ	020h		;transmitter buffer register empty
tsre	equ	040h		;transmitter shift register empty
Š

;	Modem status register constants

dcts	equ	01h		;delta clear to send
ddsr	equ	02h		;delta data set ready
teri	equ	04h		;trailing edge ring indicator
drlsd	equ	08h		;delta line signal detect
cts	equ	010h		;clear to send
dsr	equ	020h		;data set ready
ri	equ	040h		;ring indicator
rlsd	equ	080h		;received line status detect


;	Line control register constants

wls0	equ	01h		;word length bit 0 (set for 8 bit)
wls1	equ	02h		;word length bit 1 (set for 8 bit)	
stb	equ	04h		;stop bits = 2
pen	equ	08h		;parity enable bit
eps	equ	010h		;even parity select
ops	equ	00h		;odd parity select
stp	equ	020h		;stick parity
brk	equ	040h		;set break
dlab	equ	080h		;divisor latch access bit


;	Interrupt enable register constants

imask	equ	00h		;mask out interrupts
erbfi	equ	01h		;enable receive buffer full interrupt 
etbei	equ	02h		;enable transmit buffer empty interrupt
elsi	equ	04h		;enable receiver line status interrupt
edssi	equ	08h		;enable modem status interrupt


;	Modem control status register constants

dtr	equ	01h		;data terminal ready
rts	equ	02h		;request to send


;	Divisor latch constants

;****************************************************************
;*								*
;*	  S-100 Bus status line constants			*
;*								*
;****************************************************************

smemr	equ	0a1h
sm1	equ	0e1h
swo	equ	01h
sout	equ	031h
sinp	equ	021h
Šsinta	equ	025h
shlta	equ	023h
sxtrq	equ	020h

;****************************************************************
;*								*
;*	Memory map and device assignments...			*
;*								*
;****************************************************************

prom	equ	0
ram	equ	1000h	
ramlen	equ	400h
reg	equ	8000h
ubase	equ	0a000h
uart0	equ	0a020h
uart1	equ	0a040h
uart2	equ	0a080h


;****************************************************************
;*								*
;*	  Memory Mapped registers (read only)			*
;*								*
;****************************************************************

dsy0in	equ	reg 
vint    equ	reg + 1
distb	equ	reg + 7

;****************************************************************
;*								*
;*        Memory Mapped registers (write only)			*
;*								*
;****************************************************************

ds0out	equ	reg
dsy1out	equ	reg + 1
hiaddr	equ	reg + 2
bustat	equ	reg + 3
cntl	 equ	reg + 4
busreq	equ	reg + 5
busrls	equ	reg + 6

;****************************************************************
;*								*
;* 		WBDMA EPROM code				*
;*								*
;****************************************************************

	org	prom

reset:	ld	a,040h
	ld 	(cntl),a		;reset the uarts
	xor	a
	ld 	(cntl),a
	ld	a,dlab
	ld	(uart0 + lcr),a
Š	ld	(uart1 + lcr),a
	ld 	(uart2 + lcr),a
	ld	hl,b9600		;9600 baud
	ld 	(uart0 + dll),hl
	ld	(uart1 + dll),hl
	ld	(uart2 + dll),hl
	ld	a,wls0 + wls1 + stb	;8 bit word,2 stop bits
	ld 	(lcr + uart0),a	
	ld	(lcr + uart1),a
	ld	(lcr + uart2),a
	jp	montr	

;	Interrupt occurred, go find out what caused it

	org 	prom+038h
intreq:	jp	intreq

;	NMI occurred, go get the command from the bus

	org 	prom+066h
attent:	jp	montr

	;
	; Zero out all of ram
	;
endpge	eqõ	(ram+ramlen)/100h

zero:	ld	hl,ram		;Start at begining of RAM
	ld	a,endpge
szero:	ld	(hl),0
	inc	hl
	cp	h		;Check if end of RAM
	jr	nz,szero
	ret

	org	prom+100h

montr:	ld	de,prompt	;Point to prompt
montr2:	ld	a,(de)		;Get first character
plp:	call	output		;Output to serial port
	inc	de		;Next character
	ld	a,(de)	
	or	a		;Print til null
	jr	nz,plp
	ld	de,0
mloop:	call	getc
	jr	c,cmd		;Letter, Check if legal command
	ld	b,4		;Shift by four
shift:	sla	e		;Put together a number in (de)
	rl	d
	djnz	shift
	add	a,e		;Add a nybble in with old number
	ld	e,a
	jr	mloop		

cmd:	ld	b,3		;Number of commands
	ld	hl,cmdtbl-2	;Address of command table - 2
cloop:	inc	hl		;Skip routine addresses
	inc	hl
	cp	(hl)		;Check for match
	inc	hl		;And inc if no match
	jr	z,found
	djnz	cloop		;Still more commands?
etrap:	ld	de,error	;Not a legal command, Print error and start 
	jr	montr2		; again.
	
found:	ld	a,(hl)		;Get low address of routine
	inc	hl
	ld	h,(hl)
	ld	l,a
	jp	(hl)		;Jump to command handler routine

cmdtbl:	db	'G'		;Go
	dw	go
	db	'P'		;Print
	dw	print
	db	'W'		;Write
	dw	write

error:	db	'?'
prompt:	db	0dh, 0ah, '* ', 0

getc:	call	input		;Read a character
	ld	a,c		;Move into (A)
	cp	'0'	
	ret	c		;Return if less then '0'
	cp	'G'		;Return with [C] set if not a number
	ccf
	ret	c
	ld	b,'0'
	cp	'9'+1
	jr	c,mhex
	ld	b,37h
	cp	b
	ret	c
mhex:	sub	b		;Adjust to real number
	ret

putl:	rra			;Swap nybbles
	rra
	rra
	rra
putr:	and	0fh		;Mask lower nybble
	adc	a,'0'		;Make an ascii didget
	cp	'9'+1
jout:	jp	c,output
	sbc	a,0f9h		;Adjust for A-F
	jr	jout

go:	ld	hl,retrn
	push	hl
	push	de
	ld	sp,stack
	pop	af
	pop	bc
	pop	de
	pop	hl
	pop	ix
	pop	iy
	ex	Af,Af'
	pop	af
	ex	Af,Af'
	exx
	pop	bc
	pop	de
	pop	hl
	exx
	ld	sp,stack-4
	ret

retrn:	ld	sp,rconst
	exx
	push	hl
	push	de
	push	bc
	exx
	ex	Af,Af'
	push	af
	ex	Af,Af'
	push	iy
	push	ix
	push	hl
	push	de
	push	bc
	push	af
	jp	entry

print:	call	format		;Print address
ploop:	ld	a,' '	
	call	output
	ld	a,(de)
	call	putl
	ld	a,(de)
	call	putr
	inc	de
	ld	a,e
	and	0fh
	jr	nz,ploop
	call	input	
	ld	a,c
	cp	' '
	jr	z,print
	jp	montr

format:	ld	a,0dh		;Output carraige return
	call	output
	ld	a,0ah		;Line feed
	call	output
	ld	a,d		;Output address in (de)
	call	putl
	ld	a,d
	call	putr
	ld	a,e
	call	putl
	ld	a,e
	jr	putr

write:	call	format		;Print address
wloopx:	ld	a,' '
	call	output
	call	getc		;Get high byte
	jr	c,leave
	rla
	rla
	rla	
	rla
	ld	c,a		;Move to upper nybble
	exx
	call	getc
	exx
leave:	jp	c,montr		;Non number, Return to the monitor
	add	a,c		;Put together upper and lower nybbles
	ld	(de),a		;Store
	inc	de		;Next address
	ld	a,e
	and	0fh		
	jr	nz,wloopx
	jr	write

	;
	; Input reads a character from the console serial port and returns
	; with the character in (c) and (a)
	;
cbase	equ	ubase+(consol*20h)+20h

input:	ld	a,(cbase+lsr)	;Load line status register
	and	dr		;Mask data ready bit
	jr	z,input		;Wait til character ready
	ld	a,(cbase+rbr)	;Read the character
	and	7fh		;Mask off parity
	ld	c,a		;Return with the character in (c)
	ret

	;
	; Output write the character in (a) to the console serial port
	;
output:	ex	Af,Af'		;Save character in alt register set
	ld	a,(cbase+lsr)	;Load status
	and	thre		;Wait til transmitter buffer empty
	jr	z,output
	ex	Af,Af'
	ld	(cbase+thr),a
	ret

	end