î  -* DASOFT HELP MENU *-  A. Macro libraries I. Schematic plotting B. Design editing J. Artwork plotting C. Board layout K. Terminal graphics D. Route editor L. PIN combinations E. Schematics M. PAD combinations F. Documentation N. Design hints G. Artwork utilities O. Gates & Technologies H. Auto Routing  Press the letter by the topic you want or press "Q" to exit: î -* Macro Library Editor *- The first step in the design process is to create a MACRO library file of the same name as the design file. The Macro file contains three basic pieces of information on each component: 1. A symbolic description of which pins on the package are: Control Inputs Control Outputs Data Inputs Data Outputs Voltage Pins and 3 character mnemonic names for the functions of these pins. 2. A description of what the size and spacing of the pads for the component looks like. 3. The combination of pins that form each element, if there are multiple elements in a package.    î  -* Design Editor *- The Design Editor works entirely memory resident. This is necessary to provide adequate speed, but it costs in space allowed for the file system. Approximately 800 NET NAMES can be used. These NET NAMES are the names you give to the interconnections in the design. It doesn't matter how many connections are in a net, just the number of distinct names. Approximately 180 to 200 components are possible. This number can vary greatly depending on the type of logic used. SSI gates use the least memory space, followed closely by MSI/LSI and, finally, discrete components take up a great deal of space. When an element is too large for it's logic diagram to fit on the screen, a columnar format, with the pin number and it's name given (with a + or - prefix for high or low active polarity) and then an entry field for the signal name, is used.   î  -* Board Outline Editor *- This is where you describe the physical specs of your board. The information asked for is the OUTLINE of the board, positions and sizes of mounting holes, the sizes of pads used in the design, and the placement of power supply grids for power distribution. To represent the board on the screen, TGRAPHS.CTL is used as in the ROUTE editor. The Printed Circuit Board is represented by a matrix of .050 inch grids; each grid represented by a single screen character. The maximum board size is 127 grids high (Y axis) by 250 grids wide (X axis). The board outline may be placed anywhere inside this area. The Terminal will show a 20 grid by 80 grid section of this matrix or a 1 by 4 inch window. NOTE: This program is NOT used with ROUTE100. Create an SRI file instead.   î -* Route Editor *- The Route Editor allows the user to modify the route produced by the RTEPCB program. The router is re-entrant so the user may PRE-ROUTE certain traces, then let the router do its job with the pre-entered routes already established (and unchangeable, except by the designer). Entering any of the full screen graphics editing commands will result in the system going into GRAPHICS MODE as evidenced by the mode message being printed at the top of the screen where the CMD? line used to be. To exit GRAPHICS MODE type "S" or "Q" and you will be returned to the command line. To exit the EDITOR type "S" to save or "Q" to exit without saving any changes made. NOTE: This program is NOT used with ROUTE100. Use EDIT100 instead.   î  -* Schematic Generation *- Once the DESIGN file has been created and all locations assigned for the logic diagrams, and header information has been entered, it is time to create the logic drawings. The DASOFT system uses ANSII standard notation in all automated logic drawings. (see PLOTTING schematics, "I" on help menu) Usually there are several iterations at this point: The designer can throw together a schematic in a very short period of time and then analyze the drawings produced and 'fine tune' the rest of the system to make the final drawings. Typing "C" from the main menu will start schematics generation, by calling in the Automated Logic Drawing compiler. Then you will be asked named "(design file name).ALD". example: PRETEND.ALD   î  -* Documentation *-  The DASOFT system produces three types of hardcopy documentation. -* NET LIST *- The netlist is a printout of all your design interconnections and pin locations. Also printed are warning and error diagnostic messages based on design rule inconsistancies detected by the system during its design check. -* WIRE LIST *- The wirelist can be used to generate a wirewrapped prototype of your design. -* PARTS LIST *- Each type of device and the number used in the design are listed for fabrication and costing purposes.   î  -* DASOFT Artwork utility *-  This utility generates a hardcopy MATRIX printout (132 columns) of the PCB routing on your standard system printer. X and Y coordinates are listed along each axis for easy component placement. A blank matrix is a useful tool for component and grid placement and may be printed with the "BLANK" command. This printout uses specified characters to represent the various components of the PCB layout. The MATRIX is also useful for PCB route editing!    î -* DASOFT Automatic router *- The route process is a two step routine. First the Printed Circuit Generation program ("F" on the main menu) is run to compile a "to-from" list from the design. This is done using information from the filename.DRL, .MAC, and .OTL files. The compiled file is named "filename.RBN" example: PRETEND.RBN Then either the RTEPCB program ("J" on the main menu) or the ROUTE100 system is run. RTEPCB produces a "filename.RTE" file which can be plotted at any time. The RTEPCB router has four commands: F - Finish line being routed then save file an exit Q - Abort routing immediately 1 - call user graphics routine SIDE 1 2 - call user graphics routine SIDE 2 (1 & 2 are used ONLY IF the system is installed on a graphics CRT)   î  -* PLOTTING schematics *- The "I" command on the main menu initiates the schematic plot routine. The DESIGN file name is specified, and any plot options may be added. If no single page is specified, all pages will be printed in order, starting with page 1. To generate additional copies of the same schematic, only this command is required. If a change has been made in the editor, however, the file must be recompiled with the ALD compiler. This is option "C" from the DASOFT main menu. Schematic plot options: # = plot a specific page ("#" = 1 or 2 digit page number) B = Do not draw a border on page M = Do not create letter/number matrix L = Do not draw signal lines example: B:PRETEND [3MB   î  -* PLOTTING artwork *- The "K" command from the main menu sends the specified artwork file to the plotter. The plotter program expects the file to end with ".RTE". Parameters may be given to vary the artwork. These parms must be preceeded by a left bracket: 2 - Double sized (2:1) C - Composite artwork (pads and lines on both sides) O - Draw board Outline T - Enter Text mode after drawing artwork S - Slow the plotter down (if it can) B - Start on side 2 example: B:PRETEND [2CO Entering "TEXT" as the parameter allows you to go directly into text mode without plotting a design.   î  -* Using terminal graphics *- The DASOFT system uses character graphics to display/edit the information in the routed design file and to enter/edit Printed Circuit board outline, mounting hole, and grids on a standard character terminal. The control keys used while in terminal graphics mode are assigned at installation time. The DASOFT system is shipped with the terminal graphics control keys set up for a 10-key pad.   î  -* PIN combination information *- If you enter new devices that have more than one element per package, then the pin combinations for each element must be entered. There is no limit, however, to the number of devices that can reference an existing PIN combination so long as it applies. First you enter the number of logical elements (gates) contained in the IC package. Next you enter the number of pins associated with each element (gate). Power and ground are ignored. Pin numbers must be entered in the EXACT order as they will appear in the ADD command screen. * Type 1 pin entries do not include voltage pins. * Type 2 pin entries do include voltage pins in each element examples: +01 or 1 or -13 3 characters can be entered: +/- indicate signal polarity; (+) high active signals are the default.   î  -* PAD combination information *- A PAD footprint is required for each device configuration (except type 1 devices). Any number of devices may reference a given PAD footprint. The maximum number of possible pads is 76. default size: PAD types: .04 inches 0 = via or feed-through .055 "  1 = standard IC pad .06 "  2 = user definable, usually discrete .1 "  3 = user definable, usually large pads All PAD positions are specified relative to whatever PAD is designated as the 00,00 PAD. By convention, PAD 1 is the reference, with PAD 2 below it. All relative positions are specified in multiples of 50 mil increments. (ROUTE100 users should use a 100 mil grid.) The default ORIENTATION (00) positions PAD (pin) 2 directly below PAD (pin) 1.   î -* DESIGN hints *- * The first and most important hint is to read the documentation! * :Macros: When placing multiple elements in the same package, EACH ELEMENT MUST BE PLACED WITH THE SAME COORDINATE AND ORIENTATION! * :Schematics: When placing logic blocks, plan on showing up to four levels of logic on a page. DO NOT PLACE ANY MORE THAN YOU HAVE TO ON A SINGLE PAGE. Use the longest names you can. Try using the convention of a + or - symbol on EVERY line name for active high or low, this will help in checking the polarity of signals without chasing line names. * :RTEPCB Artwork: In general, place RAM chips slightly farther apart than they are wide, i.e. .4" separation for .3" RAM chips. It is a good idea in most cases to place the RAM arrays at the edge of the board so as to interfere with normal flow as little as possible. When dealing with a line of RAMs, it is usually better to PRE-ROUTE the BUS lines before the general routing begins. This guarantees that the BUS lines will be laid out correctly and all other lines are secondary to them.   î  -* GATES & TECHNOLOGIES information *- To use the DeMORGAN EQUIVALENT FUNCTION, use a "*" after the MACRO number when calling it up in the design editor. An example would be to ask for an OR gate by entering "7400*". If no extension is specified, all multi-gate packages default to an "A" suffix. To specify that a distinct gate in the package be used, the suffix for that gate is appended to the macro number. There must be a dash (or asterisk) between the MACRO number and the suffix. example: 7400-B or 7400*B (NAND) (OR) The technology abbreviation is used only on type 1 and type 2 MACROs, and is specified AFTER THE FIRST TWO DIGITS of the MACRO number. examples: 7400, 74ALS05*B, 74LS32, 74S08, 74HC04, 74H38, 74C74, 74F74   î  -* ADDING a new macro device *- First describe the TYPE of device and the NUMBER OF PINS of each type. Type 1: A 14 pin DIP package with power on PIN 14 and ground on PIN 7. Type 2: A logical element with control inputs or control outputs, any package style. Type 3: Has ONLY inputs and outputs and is used for everything else. Type J: Used for the special case of a EDGE CONNECTOR on the board or a RIBBON CABLE CONNECTOR whi ch has a regular array of pads.  -* Enter the device type on the command line *- î  You are ending an editing session. If you press "Q" here you will be returned to the DASOFT MAIN MENU without saving any changes made.  -* Press any other key to go back *- î  *** WARNING! ***  A commited design cannot be edited!! Press "Y" if your sure you want to do this, or any other key to continue.î  -* Design Requirements List Editor *- This option takes you into the core of the DASOFT Design Automation software. It is within the Design editor that a design file is created, and filled with the necessary design information. It is then edited, and finalized. The editor produces a file with "DRL" as the extent. example: PRETEND.DRL It is with this "DRL" file, ( and the associated MACRO file of the same name) that other DASOFT programs work to produce the various finished products which go into the making of a fully documented Printed Circuit Board package.î The ALD compiler will combine the component information from your Macro Library file (filename.MAC) with the information in your design file (filename.DRL) to produce a "to-from" print file for the schematic plot routine, ALDPLOT. This file is called filename.ALD. example: PRETEND.ALD Any time a change is made to either the DRL or MAC file, the ALD compiler should be run again to update the Automated Logic Drawings.î  -* Macro Device Editor *- This editor is used to create and edit component libraries. This file must contain all of the MACRO devices used in the design. Each design should have its own library, named the same as the design file. example: PRETEND.MAC Devices may be entered directly by the designer or TRANSFERRED from an existing library. All the physical and logical information about each device must be entered before it can be used. Several MACRO device libraries are available from DASOFT.î  -- CIRCUIT DESIGN AND DOCUMENTATION -- -- PRINTED CIRCUIT BOARD GENERATION -- (A) Macro Device Library EDITING (E) Physical Board OUTLINE Specs (B) Design Requirements List EDITING (F) Printed Circuit GENERATION (C) Automated Logic Drawings GENERATION (G) Routed Board EDITING (D) Documentation GENERATION (H) Board Artwork UTILITIES -- DASOFT SYSTEM COMMANDS -- -- CP/M SYSTEM COMMANDS -- (Q) EXIT to operating system (I) Run ALDPLOT (N) show NEXT command menu (J) Run RTEPCB (?) for HELP (K) Run PCBPLOT (:) Select PROGRAM drive or default DATA drive Currently:îî -- Design Requirements Listing File Editor -- (A) Edit DESIGN info HEADER (D) List Devices in MACRO LIBRARY (B) Edit COMMENT BLOCKS (E) List Devices used in DESIGN (CT) Prevent future FILE CHANGES (F) Load a new MACRO FILE  -- "??" Equals DEVICE or UNIT number -- -- "[tt]" Equals optional technology type -- (??[tt]??) ADD a new Device (U??) EDIT Device by unit number  (Q) EXIT WITHOUT SAVING FILE (S) SAVE edited file and EXIT Type "?" for HELPî -- Macro Library Editing Menu -- (A) ADD new macro devices (F) Create PIN combinations (B) LIST devices in library (G) Create PAD footprints (C) TRANSFER devices between libraries (?) Help  -- "??" Equals PIN, PAD or DEVICE number -- (D??) DELETE device by number (F??) Edit PIN combo by number (E??) EDIT MACRO by number (G??) Edit PAD combo by number  (Q) EXIT WITHOUT SAVING FILE (S) SAVE edited file and EXITî  A PAD combination is created for each unique PCB footprint. The PAD combination includes both the size (type 0, 1, 2, or 3) of the pads and the spacing of all pads relative to the PIN 1 pad. Type 2 and 3 pad sizes are user-definable in the Outline Editor. Remember, when entering PAD footprints, that the ORIENTATION of the footprint on the PCB is specified in the design editor. Orientation 00 defines Pin 2 BELOW Pin 1.î  A PIN combination is created for a TYPE 1 or TYPE 2 component ONLY IF there are multiple gates in the package. No PIN combination is needed for TYPE 3 or J, or if the component is a single element. TYPE 1 devices do NOT have power and ground pins included in the PIN combination. TYPE 2 devices MUST have the power and ground pins listed with the pins for EACH gate.î  Type 1 components have the following characteristics: - they must be a 14 pin DIP with power on pin 14 and ground on pin 7. - they require a PIN Reference entry IF there are multiple elements within the package. - they do NOT require a PAD Reference. - they may NOT have a "J" as the unit letter.î  Type 2 components have the following characteristics: - they have Control signals (CLOCK, INTERRUPT, CLEAR, etc.) as well as Data signals - they require a PIN Reference entry IF there are multiple elements within the package. - they have less than 60 pins. - they may NOT have a "J" as a unit letter.î  Type 3 components have the following characteristics: - they are not either Type 1 or Type 2; i.e. they are something else. - they may be an analog device - they may use upto 3 "prompts" to specify further information about themselves: power, color, etc. - they do not require a PAD Reference IF they have only 2 pins. They can use the SPACING entry on the design editor entry screen instead. - they may NOT have a "J" as a unit letter.î  Type J components have the following characteristics: - they are either a card edge connector or a ribbon cable header. - they MUST have a "J" for the unit letter. - they will not have lines drawn to them on the ALDs (schematics). - they have pins numbered consecutively 1 thru N, left to right, on the component side and N+1 thru last #, left to right, on the solder side. - they have a HIGHT, WIDTH and SPACE (center to center) specified in .005 inch units on the Design Editor entry screen. - they have a different definition for ORIENTATION. Check your User Manual for special information on "J" connector orientation. - they have a different PIN 1 placement scheme than other component types. Check your User Manual.î The OUTLINE EDITOR uses the DASOFT Graphics Mode to input information about the physical specifications of the PCB. Each screen character represents 1 50-mil grid on the board matrix. Cursor movement commands are used to enter the edge of the board and the power and ground grids. Mounting hole locations and sizes are entered from the menu option (M). Pad sizes are defined with the option (P).î  The Route Editor uses the DASOFT Graphics Mode to EDIT artwork routed with the RTEPCB auto-router. It cannot be used with artwork generated by the ROUTE100 system. Screen characters represent each 50 mil grid of the board matrix, and by moving the cursor the user may: ADD traces and vias - ADD mode (T) with the pen DOWN (. period) ERASE traces and vias - ERASE mode (E) with the pen DOWN (.period) change CURSOR SIDE - with "7" (side 1) and "9" (side 2) change VIEWING SIDE - with "51" (side 1) and "52"(side 2) change PAD SIZE - with PAD command (P) from the menu Typing "S" or "Q" will exit graphics mode and another "S" or "Q" will exit the editor.î! -:NET LIST:- the NET LIST describes each complete NET (circuit) of the board, giving the pin number and location on the ALD and the PCB of every node on the NET. -:PARTS LIST:- the PARTS LIST provides the description, quantity and location of each different component on the board. This list is automatically produced at the end of every NET LIST. -:WIRE LIST:- the WIRE LIST can be used for the production of wire-wrapped prototype boards. The connections to be wired are given in order of length and wrap layer. If you choose to send the list directly to the OUTPUT device, no NET/WIR file will be created on the disk. To save the lists to disk, type "N" in response to the OUTPUT question and then type the NET/WIR file from CP/M. î" This option allows you to produce a hardcopy printout of your board grid matrix. The printed copy is 132 columns wide and you may set the length with the (break number) option. A blank matrix (for use in initial parts placement) may be generated by typing "BLANK" for the filename.  =< NOTE >= A list of the UNROUTES left by the router will be printed at the end of the artwork printout.î# The PCB compiler combines information from the DRL, MAC and OTL files to produce input files for the auto-routers. It creates a filename.RBN file which is used by the RTEPCB package and the ROUTE100 system. If a filename.RBN already exists on the disk when the PCB compiler is run, you will see the message: Route file loaded... This tells you that the compiler is ADDING to the existing file, not creating a new one.î$ The ALDPLOT program is used to produce a set of Automated Logic Drawings. The required source file is "filename.ALD". ALDs may be plotted at any time in the design process and can be produced either page by page, in order, or by single specified page number.   î% This program will automatically route your printed circuit board. It is a re-entrant routine, so if there is a filename.RTE file on your disk, i.e. one created by an earlier route pass, the output of this program run will be ADDED to the existing file. In that case, you will get a number of: Net previously routed... messages. Indicating the router is skipping that route.   î& PCBPLOT will produce plots of your routed artwork on your X-Y plotter. You may modify the output in several ways by adding parameter options to the filename entry above. The option letters should follow the name and be preceded with a [ (square bracket). example: B:PRETEND [COB2 Options: C - Composite (2-layer) artwork (Default is 3-layer) O - Draw OUTLINE B - Plot solder side only 2 - Plot at 2X size T - Enter TEXT mode after artwork plot S - Slow the plotter for better ink flow   î' -- Outline Editor commands --  (O) Enter/Edit board OUTLINE (P) Define PAD sizes (G) Enter/Edit POWER GRID lines (E) ERASE lines (M) Enter/Edit MOUNTING HOLES (?) for HELP  (Q) EXIT WITHOUT SAVE (S) SAVE file and EXITî( -- Route Editor Commands --  (T) ADD traces (N) Print NUMBER of unrouted nets (E) ERASE traces (C) Show COORDINATES of next unroute (F) Add FAT grid lines (P) + <1> Change default PAD size <E> ERASE pad (?) for HELP <M> Reference MARK  (Q) EXIT WITHOUT SAVE (S) SAVE file and EXITîÿÿÿ