drsel	equ	0fch	;DR 0, HD 0, STEP OUT
	drvrdy	equ	20h	;Drive Ready bit
	cntrl	equ	0dh	;WENBL, MCLK, FRENBL
	clrflt	equ	5h	;Toggle 3bit to clr wrfault
	run	equ	0fh	;cntrl + RUN bit
	wrsect	equ	7h	;WRITE SECTOR COMMAND
	rdsect	equ	3h	;READ SECTOR COMMAND
	opdone	equ	2h	;OP DONE STATUS BIT
	tkzro	equ	1h	;Track Zero bit
	halt	equ	80h	;Halt bit
	nflt	equ	10h	;Write Fault
	tmout	equ	8h	;Timeout bit
	cmplt	equ	4h	;Complete bit
	xrtry	equ	2h	;Auxilliary status retry bit
	djiost	equ	0e3f9h	;DJ UART STATUS
	djdata	equ	0e3f8h	;DJ DATA
	djdr	equ	4h	;DJ DATA READY WHEN OFF
	wboot	equ	0h	;RESTART
	tstpat	equ	0aah	;Test pattern 10101010
	himem	equ	8h	;High Memory Select & Reset

	org	100h
	;select drive, head & Mclock, out step direction
setup	mvi	a,drsel
	out	52h
	mvi	a,cntrl		;enable function register
	out	50h
	;toggle write enable to clr write fault
	jmp	setup
cksumr	db	acr,alf
	db	'check sum error$'
end	100h