;	This routine tests the 1K Ram on the HDCA-3 hard disk
;controller board by continuously writing AA and 55 patterns
;to all memory locations until interrupted from the keyboard.
;	In the unlikely event that an error is noted the
;erroneous byte is transmitted to the terminal.

	org	100h
	mvi	a,8h		;Select high memory
	out	51h		;Tell Command Register
begin	lxi	b,55aah		;load test patterns
start	lxi	h,4		;load counter with 1K memory size
loop	mov	a,b		;first test pattern to A register
	out	53h		;send to HDCA Data Port
	dcr	l		;reduce count
	mov	a,c		;move alternate test pattern to A
	out	53h		;send to HDCA Data Port
	dcr	l		;reduce count again
	jnz	loop		;Continue Loop until low order byte=0
	dcr	h		;reduce high order byte
	jnz	loop		;do 256 byte loop til high order byte=0
	mvi	h,4		;reset high order counter
cklp	in	53h		;Read HDCA Data Port
	cmp	b		;Compare with first test pattern
	cnz	error		;if wrong, do error routine
	dcr	l		;reduce low order count
	in	53h		;read HDCA Data Port again
	cmp	c		;compare with alternate test pattern
	cnz	error		;if wrong, do error routine
	dcr	l		;reduce low order count again
	jnz	cklp		;loop til low order byte=0
	dcr	h		;reduce high order byte
	jnz	cklp		;loop til high order byte=0

	lda	0e3f9h		;load DJ Uart Status
	ani	4		;check Data Ready bit
	in	53h		;load HDCA Data Port to give a
				;1-byte offset
	jnz	start		;repeat until keyboard interrupt
	jmp	0		;reboot on interrupt

error	push	h		;save counter
	push	b		;save test patterns
	mov	e,a		;put errant byte in E register
	mvi	c,2		;BDOS code to output E
	call	5		;BDOS call
	pop	b		;restore registers
	pop	h
	ret			;and return