title djdma/format.asm 01-29-82 .z80 channl equ 50h ;Start channel address index equ 10h ;Delta index status bit wproct equ 40h ;Write protected status bit dready equ 80h ;Drive ready status bit home equ 0a0h ;Internal home-disk routine address seek equ 0a3h ; seek-track sdrive equ 0a6h ; set-drive hsync equ 0a9h ; header-sync diskd equ 4001h ;Disk data port status equ 4003h ;Status port contrl equ 4007h ;Control port crlfs equ 0d0ah ;Carraige return / line feed sequence acr equ 0dh ;A carraige return character alf equ 0ah ;A line feed character aesc equ 1bh ;An escape character adel equ 7fh ;A delete character retries equ 3 ;Disk retries before giving up on verify bdos equ 5 ;Bdos entry address wcon equ 2 ;Write console function direct equ 6 ;Direct console I/O the crc generator ld (de),a ;Change mode ld a,(dsect) ;Get the sector number inc a cp 1bh ;Test for last sector +1 dlast equ $-1 ld (hl),4eh ;First byte of postamble jr nz,$+4 ;Zero => all sectors written ld a,1 ld (dsect),a ;Update the sector number ld b,35h ;Postamble length less one ddlbla: ld (hl),4eh djnz ddlbla ;Write the postamble jr nz,dmloop ld (hl),4eh ;First fill byte ld b,0 ;Double sided bit test ddsbit equ $-1 ld a,(dside) xor b ;Conditionally switch the side byte ld (dside),a ;Update the side byte ld (hl),4eh ;Second fill byte ld b,4fh ;Preamble length less one ex Af,Af' ;Save the double sided status dlblb: ld (hl),4eh ;Write a fill byte ld a,(status) and index ;Wait for the index pulse jr z,dlblb ex Af,Af' ;Recover the double sided status jr z,ddlblc ;Zero => track write is done ld a,(iy+2) ;Drive pattern or 0ch ;Turn off the step command and 0fdh ;Change read/write heads ld (4005h),a ;Update the command register ld (hl),4eh ;First preamble byte jp ddlbl3 ;Format the other side ddlblc: ld (hl),4eh ;Trailing fill byte ld (hl),4eh ;Trailing fill byte ld (hl),4eh ;Trailing fill byte xor a ld (de),a ;Turn off the write gate ld a,6 ld (4006h),a ;Turn off the controller ld a,40h ;Status code ret ddadvt: ld a,(dtrck) ;Get the current track value inc a ;Increment ld (dtrck),a ;Restore the new value ret ;Return with current track value .dephase page ; ; IBM 8 inch double density formatter routine ; single equ $ .phase 1030h sdfmt: ld a,0 ;Second byte filled with proper drive number call sdrive ;Select the new drive ret nz ;Return if wrong value ld a,(iy+2) ;Get the drive pattern or 0fh ;Side 0 and no step command ld (4005h),a ;Update drive control register ld hl,0 ;Delay for the head load sdwait: dec hl ld a,h or l jr nz,sdwait ld (ix+0bh),a ;Reset the index counter sdtrk0: call home ;Calibrate the head(s) bit 5,(hl) ;Test for track zero jr z,snrext sdrdy: ld hl,status bit 7,(hl) ;Test for the drive ready snrext: ld a,82h ;Drive not ready code ret z ;Error exit bit 6,(hl) ;Write protect bit ld a,90h ;Write protect error code ret nz ld (ix+0bh),0 ;Reset the index counter ld a,(strck) ;Get the new track cp (iy+1) ;Compare with current track call nz,seek ;Do track seek if necessary ld hl,diskd ;Controller data register ld de,contrl ;Control register ld b,28h ;Preamble length sdlbl1: ld a,(status) and index jr nz,sdlbl1 ;Wait for no index pulse sdlbl2: ld a,(status) and index jr z,sdlbl2 ;Wait for leading edge of new index pulse ld a,90h ;Clear the crc register & turn on write gate ld (de),a ;Change modes ld a,44h ;Single density & start bit ld (4006h),a ;Start the controller sdlbl3: ld (hl),0ffh djnz sdlbl3 ;Write the preamble ld a,80h ;16 bit write mode ld (de),a ;Change modes ld b,0ch ;Zero preamble length sdlbl4: ld (hl),0aah ;Half a zero cell djnz sdlbl4 ;Write the zero preamble ld (hl),0f7h ;First half of fc ld a,90h ;8 bit write mode ld (de),a ;Change modes ld (hl),7ah ;Second half of fc ld b,1ah ;Postamble length sdlbl5: ld (hl),0ffh djnz sdlbl5 ;Write the postamble smloop: ld a,80h ;16 bit write mode ld (de),a ;Change modes ld b,0ch ;Sector header preamble length sdlbl6: ld (hl),0aah ;Half a zero cell djnz sdlbl6 ;Write the preamble ld a,81h ;Enable crc & 16 bit write ld (de),a ;Change modes ld (hl),0f5h ;First half of fe ld a,91h ;Enable crc & 8 bit write ld (de),a ;Change modes ld (hl),7eh ;Second half of fe ld (hl),0 ;Write the track strck equ $-1 lD (hl),0 ;Write the side byte sside equ $-1 ld (hl),1 ;Write the sector number ssect equ $-1 ld (hl),0 ;Write the sector length code ld a,0a1h ld (de),a ;Change modes ld (hl),a ld (hl),a ;Write the crc bytes ld a,90h ;Reset the crc ld (de),a ;Change modes ld b,0bh ;Sector header postamble length sdlbl7: ld (hl),0ffh djnz sdlbl7 ;Write the postamble ld a,80h ;16 bit write mode ld (de),a ;Change modes ld b,0ch ;Data field preamble length sdlbl8: ld (hl),0aah ;Half a zero cell djnz sdlbl8 ;Write the preamble ld a,81h ;Enable crc & 16 bit write ld (de),a ;Change modes ld (hl),0f5h ;First half of fb ld a,91h ;8 bit write ld (de),a ;Change modes ld (hl),6fh ;Second half of fb ld b,80h ;Sector data field length sdlbl9: ld (hl),0e5h djnz sdlbl9 ;Write the data field ld a,0a1h ld (de),a ;Change modes ld (hl),a ld (hl),a ;Write the crc bytes ld a,90h ;Reset the crc ld (de),a ;Change modes ld a,(ssect) ;Get the current sector inc a ;Advance cp 1bh ;Compare with 27 ld (hl),0ffh ;First postamble byte jr nz,$+4 ;Zero => all sectors written ld a,1 ld (ssect),a ;Update the sector ld b,1ah ;Postamble length less one sdlbla: ld (hl),0ffh djnz sdlbla ;Write the postamble jr nz,smloop ;Test for more sectors to format ld (hl),0ffh ;First fill byte ld b,0 ;Side bit sdsbit equ $-1 ld a,(sside) ;Get the current side xor b ;Conditionally switch side bits ld (sside),a ;Update the side byte ld (hl),0ffh ;Write second fill byte ld b,19h ;Preamble length less one ex Af,Af' ;Save the double sided status sdlblb: ld (hl),0ffh ;Write a fill byte ld a,(status) and index jr z,sdlblb ;Wait for the index hole ex Af,Af' ;Recover the double sided status jr z,sdlblc ;Zero => single sided ld a,(iy+2) ;Get the drive pattern or 0ch ;Turn off the step command and 0fdh ;Turn on head one ld (4005h),a ;Update drive control register ld (hl),0ffh ;Write first preamble byte jp sdlbl3 ;Go format the other side sdlblc: ld (hl),0ffh ;Trailing byte xor a ld (de),a ;Turn off write gate ld a,6 ld (4006h),a ;Turn off the controller ld a,40h ;Status code ret sdadvt: ld a,(strck) ;Get the current track inc a ;Advance track value ld (strck),a ;Update the track value ret ;Return with track value .dephase page ; ; North Star multi desity formatter routine ; nsform equ $ .phase 1030h nsfmt: ld a,0 call sdrive ret nz ld (ix+0bh),0 ld a,(iy+2) or 0eh ld (4004h),a call hsync nsexit: ld a,82h ret z track0: call home bit 5,(hl) jr z,nsexit entry: ld (ix+0bh),0 ld a,(track) cp (iy+1) call nz,seek ld a,(4003h) and 40h ld a,90h ret nz ld (ix+0ah),80h wsect0: call hsync jr z,nsexit xor a cp (ix+0ah) jr nz,wsect0 ld a,90h ld (contrl),a ld hl,diskd ld c,0 ld (ix+9),c ld b,11h ld a,0 den1 equ $-1 rra ld a,64h jr nc,cstart ld a,18h strack equ $-1 rra add a,5 cp (iy+1) sbc a,a and 10h or 24h ld b,20h cstart: ld (4006h),a zerow: ld (hl),0 ex (sp),hl ex (sp),hl djnz zerow ld a,(den1) or a jr z,lasts ld (hl),0fbh ex (sp),hl ex (sp),hl lasts: ld (hl),0fbh ld b,5ch ld e,20h data equ $-1 ld d,20h cpdata equ $-1 xor a d1loop: ex (sp),hl ex (sp),hl ld (hl),e xor e rlca djnz d1loop ld b,51h den2 equ $-1 ex (sp),hl ex (sp),hl ld (hl),d xor d rlca ex Af,Af' ld a,e ld (cpdata),a ex Af,Af' ex (sp),hl ex (sp),hl ld (hl),e xor e rlca d2loop: ex (sp),hl ex (sp),hl ld (hl),e xor e rlca ex (sp),hl ex (sp),hl ld (hl),e xor e rlca djnz d2loop ex (sp),hl ex (sp),hl ld (hl),a ld a,(den1) or a ld b,11h jr z,$+4 ld b,20h iloop: ex (sp),hl ex (sp),hl ld (hl),e ld a,(status) and index jr z,iloop inc c ld a,0ah cp c jr nz,zerow ld c,0 ld a,(nsdsid) xor 0 dflag equ $-1 ld (nsdsid),a jr z,ftdone ld a,(iy+2) or 0eh and 0fdh ld (4004h),a jr zerow ftdone: ld (contrl),a ;Turn off write gate ld a,40h ret advtrk: ld a,(track) ;Get the current track inc a ;Advance track value ld (track),a ;Update the track value ret ;Return with track value track: 0 nsdsid: 0 .dephase ecode equ $ ;End of code marker, stack follows ds 30h ;Room for the stack buffer equ $ ;Track read buffer end