( HDC PAL LOAD SCREEN )                                                                                                         129 LOAD                                                        133 LOAD                                                        137 LOAD                                                        141 LOAD                                                        145 LOAD                                                        148 LOAD                                                        150 LOAD                                                        154 LOAD                                                        157 LOAD                                                                                                                                                                                                                                                                                                                                                                                        ( HDC/DMA - DMA ADDRESS PAL FOR A12-A15 & A22-A23          8DB )                                                                PALS   16R6                                                                                                                     1. CLK                          20. VCC                         2. /HENA                        19. /A23CRY                     3. /EENA                        18. A15                         4. /A21CRY                      17. A12                         5. D7                           16. A22                         6. /A11CRY                      15. A23                         7. D6                           14. A13                         8. D4                           13. A14                         9. D5                           12. /A15CRY                     10. GND                         11. /OE                                                                                         -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A12-A15 & A22-A23          8DB )                                                                / A22   = / /EENA   *   / D6                 ( LOAD COMPLEMENT )        + /EENA   *   / /A21CRY   *   A22             ( TOGGLE )        + /EENA   *   /A21CRY   *   / A22               ( HOLD )                                                                / A23   = / /EENA   *   / D7                                            + /EENA   *   / /A21CRY   *   A22   *   A23                     + /EENA   *   /A21CRY   *   / A23                               + /EENA   *   / A22   *   / A23                                                                                         / /A15CRY =  HI                                ( TRI-STATE ENA )        +   / /A11CRY   *   A12   *   A13   *   A14   *   A15   / /A23CRY =  HI                                ( TRI-STATE ENA )        +   / /A21CRY   *  A22   *   A23                        -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A12-A15 & A22-A23          8DB )                                                                / A12   = / /HENA   *   / D4                 ( LOAD COMPLEMENT )        + /HENA   *   / /A11CRY   *   A12             ( TOGGLE )        + /HENA   *   /A11CRY   *   / A12               ( HOLD )                                                                / A13   = / /HENA   *   / D5                                            + /HENA   *   / /A11CRY   *   A12   *   A13                     + /HENA   *   /A11CRY   *   / A13                               + /HENA   *   / A12   *   / A13                                                                                                                                                                                                                                                                                                                                                         -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A12-A15 & A22-A23          8DB )                                                                / A14   = / /HENA   *   / D6                                            + /HENA   *   / /A11CRY   * A12 * A13 * A14                     + /HENA   *   /A11CRY   *   / A14                               + /HENA   *  / A12  *  / A14                                    + /HENA   *  / A13  *  / A14                                                                                            / A15   = / /HENA   *   / D7                                            + /HENA   *   / /A11CRY  * A12 * A13 * A14 * A15                + /HENA   *   /A11CRY   *   / A15                               + /HENA   *   / A12   *   / A15                                 + /HENA   *   / A13   *   / A15                                 + /HENA   *   / A14   *   / A15                         PAL.   TWEEK                                                    LIMIT 512 0 SAVE 8DB-C.DAT                       ( REV 6/22/81 )( HDC/DMA - DMA ADDRESS PAL FOR A4-A7 & A20-A21            6DB )                                                                PALS   16R6                                                                                                                     1. CLK                          20. VCC                         2. /LENA                        19. /A21CRY                     3. /EENA                        18. A5                          4. /A19CRY                      17. A4                          5. D7                           16. A21                         6. D6                           15. A20                         7. D4                           14. A6                          8. D5                           13. A7                          9. /A3CRY                       12. /A7CRY                      10. GND                         11. /OE                                                                                         -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A4-A7 & A20-A21            6DB )                                                                / A20   = / /EENA   *   / D4                 ( LOAD COMPLEMENT )        + /EENA   *   / /A19CRY   *   A20             ( TOGGLE )        + /EENA   *   /A19CRY   *   / A20               ( HOLD )                                                                / A21   = / /EENA   *   / D5                                            + /EENA   *   / /A19CRY   *   A20   *   A21                     + /EENA   *   /A19CRY   *   / A21                               + /EENA   *   / A20   *   / A21                                                                                         / /A7CRY =  HI                                                         +   / /A3CRY  *    A4   *   A5   *   A6   *   A7         / /A21CRY =  HI                                                        +   / /A19CRY  *  A20   *   A21                          -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A4-A7 & A20-A21            6DB )                                                                / A4      = / /LENA   *   / D4                                          + /LENA   *   / /A3CRY   *   A4                                 + /LENA   *   /A3CRY   *   / A4                                                                                         / A5      = / /LENA   *   / D5                                          + /LENA   *   / /A3CRY   *   A4   *   A5                        + /LENA   *   /A3CRY   *   / A5                                 + /LENA   *   / A4   *   / A5                                                                                                                                                                                                                                                                                                                                                           -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A4-A7 & A20-A21            6DB )                                                                / A6   = / /LENA   *   / D6                                             + /LENA   *   / /A3CRY   * A4 * A5 * A6                         + /LENA   *   /A3CRY   *   / A6                                 + /LENA   *  / A4  *  / A6                                      + /LENA   *  / A5  *  / A6                                                                                              / A7   = / /LENA   *   / D7                                             + /LENA   *   / /A3CRY  * A4 * A5 * A6 * A7                     + /LENA   *   /A3CRY   *   / A7                                 + /LENA   *   / A4   *   / A7                                   + /LENA   *   / A5   *   / A7                                   + /LENA   *   / A6   *   / A7                           PAL.   TWEEK                                                    LIMIT 512 0 SAVE 6DB-C.DAT                       ( REV 6/22/81 )( HDC/DMA - DMA ADDRESS PAL FOR A8-A11 & A18-A19           8DA )                                                                PALS   16R6                                                                                                                     1. CLK                          20. VCC                         2. /HENA                        19. /A19CRY                     3. /EENA                        18. A18                         4. /A7CRY                       17. A19                         5. /A17CRY                      16. A8                          6. D3                           15. A9                          7. D1                           14. A11                         8. D0                           13. A10                         9. D2                           12. /A11CRY                     10. GND                         11. /OE                                                                                         -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A8-A11 & A18-A19           8DA )                                                                / A18   = / /EENA   *   / D2                 ( LOAD COMPLEMENT )        + /EENA   *   / /A17CRY   *   A18             ( TOGGLE )        + /EENA   *   /A17CRY   *   / A18               ( HOLD )                                                                / A19   = / /EENA   *   / D3                                            + /EENA   *   / /A17CRY   *   A18   *   A19                     + /EENA   *   /A17CRY   *   / A19                               + /EENA   *   / A18   *   / A19                                                                                         / /A11CRY =  HI                                                         +  / /A7CRY  *  A8   *   A9   *   A10   *   A11         / /A19CRY =  HI                                                         +  / /A17CRY  *  A18   *   A19                          -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A8-A11 & A18-A19           8DA )                                                                / A8      = / /HENA   *   / D0                                          + /HENA   *   / /A7CRY   *   A8                                 + /HENA   *   /A7CRY   *   / A8                                                                                         / A9      = / /HENA   *   / D1                                          + /HENA   *   / /A7CRY   *   A8   *   A9                        + /HENA   *   /A7CRY   *   / A9                                 + /HENA   *   / A8   *   / A9                                                                                                                                                                                                                                                                                                                                                           -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A8-A11 & A18-A19           8DA )                                                                / A10   = / /HENA   *   / D2                                            + /HENA   *   / /A7CRY   * A8 * A9 * A10                        + /HENA   *   /A7CRY   *   / A10                                + /HENA   *  / A8  *  / A10                                     + /HENA   *  / A9  *  / A10                                                                                             / A11   = / /HENA   *   / D3                                            + /HENA   *   / /A7CRY  * A8 * A9 * A10 * A11                   + /HENA   *   /A7CRY   *   / A11                                + /HENA   *   / A8   *   / A11                                  + /HENA   *   / A9   *   / A11                                  + /HENA   *   / A10   *   / A11                         PAL.   TWEEK                                                    LIMIT 512 0 SAVE 8DA-D.DAT                       ( REV 6/22/81 )( HDC/DMA - DMA ADDRESS PAL FOR A0-A3 & A16-A17            6DA )                                                                PALS   16R6                                                                                                                     1. CLK                          20. VCC                         2. /LENA                        19. /A17CRY                     3. /EENA                        18. A16                         4. /A15CRY                      17. A17                         5. D3                           16. A0                          6. D1                           15. A1                          7. D0                           14. A2                          8. D2                           13. A3                          9. /HENA                        12. /A3CRY                      10. GND                         11. /OE                                                                                         -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A0-A3 & A16-A17            6DA )                                                                / A16   = / /EENA   *   / D0                 ( LOAD COMPLEMENT )        + /EENA   *   / /A15CRY   *   A16             ( TOGGLE )        + /EENA   *   /A15CRY   *   / A16               ( HOLD )                                                                / A17   = / /EENA   *   / D1                                            + /EENA   *   / /A15CRY   *   A16   *   A17                     + /EENA   *   /A15CRY   *   / A17                               + /EENA   *   / A16   *   / A17                                                                                         / /A3CRY =  HI                                                         +  /EENA  *  /HENA  *  /LENA  *  A0  *  A1  *  A2  *  A3 / /A17CRY =  HI                                                         +   / /A15CRY   *  A16   *   A17                        -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A0-A3 & A16-A17            6DA )                                                                / A0      = / /LENA   *   / D0                                          +  /LENA  *  /HENA  *  /EENA   *  A0                            +  /LENA  *   / /HENA   *   / A0                                +  /LENA  *   / /EENA   *  / A0                                                                                         / A1      = / /LENA   *   / D1                                          + /LENA   *   /HENA   *   /EENA   *   A0   *   A1               + /LENA   *   / /HENA   *   / A1                                + /LENA   *   / /EENA   *   / A1                                + /LENA   *   / A0   *   / A1                                                                                                                                                                                                                           -->                                                             ( HDC/DMA - DMA ADDRESS PAL FOR A0-A3 & A16-A17            6DA )/ A2   = / /LENA   *   / D2                                             + /LENA   *  /HENA  *  /EENA  * A0 * A1 * A2                    + /LENA   *  / /HENA  *  / A2                                   + /LENA   *  / /EENA  *  / A2                                   + /LENA   *  / A0  *  / A2                                      + /LENA   *  / A1  *  / A2                              / A3   = / /LENA   *   / D3                                             + /LENA   *  /HENA  *  /EENA  * A0 * A1 * A2 * A3               + /LENA   *   / /HENA   *   / A3                                + /LENA   *   / /EENA   *   / A3                                + /LENA   *   / A0   *   / A3                                   + /LENA   *   / A1   *   / A3                                   + /LENA   *   / A2   *   / A3                           PAL.   TWEEK                                                    LIMIT 512 0 SAVE 6DA-D.DAT                       ( REV 6/26/81 )( HDC/DMA - DMA ARBITRATION PAL                             2D )                                                                PALS    16L8                                                                                                                    1. APRIO                        20. VCC                         2. /2ENAI                       19. /2ENA                       3. P3                           18. /1ENA                       4. P2                           17. /IMHI                       5. P1                           16. /DMA0                       6. P0                           15. /DMA1                       7. NC                           14. /DMA2                       8. NC                           13. /DMA3                       9. /0ENAI                       12. /0ENA                       10. GND                         11. NC                                                                                          -->                                                             ( HDC/DMA - DMA ARBITRATION PAL                             2D )                                                                / /DMA3   =  APRIO   *   P3       ( TRI-STATE ENA )                     +  HI                                                                                                                   / /2ENA   =  HI                   ( TRI-STATE ENA )                     +  APRIO   *   /DMA3                                            +  APRIO   *   P3                                                                                                       / /DMA2   =  / /2ENAI   *   P2     ( TRI-STATE ENA )                    +  HI                                                                                                                   / /1ENA   =  HI                   ( TRI-STATE ENA )                     +  / /2ENAI   *   /DMA2                                         +  / /2ENAI   *   P2                                    -->                                                             ( HDC/DMA - DMA ARBITRATION PAL                             2D )                                                                / /DMA1   =  / /1ENA   *   P1     ( TRI-STATE ENA )                     +  HI                                                                                                                   / /0ENA   =  HI                   ( TRI-STATE ENA )                     +  / /1ENA   *   /DMA1                                          +  / /1ENA   *   P1                                                                                                     / /DMA0   =  / /0ENAI   *   P0     ( TRI-STATE ENA )                    +  HI                                                                                                                   / /IMHI   =  HI                   ( TRI-STATE ENA )                     +  / /0ENAI   *   /DMA0                                         +  / /0ENAI   *   P0             PAL.   TWEEK           LIMIT 512 0 SAVE 2D-D.DAT                        ( REV 9/09/81 )( HDC/DMA - DMA CONTROL PAL                                 3D )                                                                PALS    16R8                                                                                                                    1. CLK                          20. VCC                         2. APRIO                        19. /XFER                       3. /IMHI                        18. /PWR                        4. HLDA                         17. /SYNC                       5. DRQ                          16. /WAIT                       6. K6                           15. /DBIN                       7. HOLD_BUS                     14. /LDENA                      8. PRDY                         13. /BUSCTL                     9. XRDY                         12. /INCADR                     10. GND                         11. NC                                                                                          -->                                                             ( HDC/DMA - DMA CONTROL PAL                                 3D )/ /XFER   =  / /IMHI   *   HLDA                                           +  / /BUSCTL                                                                                                          / /BUSCTL =  / /XFER  *  HOLD_BUS                                                                                               / /SYNC   =  / /BUSCTL   *  DRQ   * /DBIN   *  /PWR  *  /SYNC                                                                   / /DBIN   =  / /SYNC   *   K6     +   / /WAIT   *   / /DBIN                                                                     / /PWR    =  / /SYNC   *   / K6   +   / /WAIT   *   / /PWR                                                                      / /INCADR =  / /DBIN   *   /WAIT   +   / /PWR   *   /WAIT       / /LDENA  =   / DRQ    *  /INCADR                               / /WAIT   =  / XRDY   +   / PRDY                PAL.   TWEEK    LIMIT 512 0 SAVE 3D-D.DAT                        ( REV 9/14/81 )( HDC/DMA - BIT COUNTER                                     9C )                                                                PALS    16R6                                                                                                                    1. CLK                          20. VCC                         2. SRQA                         19. CELLCLK                     3. /PLOENA                      18. /T3                         4. SREAD                        17. /T2                         5. 2VCLK                        16. /T1                         6. SRQH                         15. BYTE                        7. 2XCLK                        14. /DATA                       8. /ZERO                        13. DBYTE                       9. /HANG                        12. CRCDATA                     10. GND                         11. /OE                                                                                         -->                                                             ( HDC/DMA - BIT COUNTER                                     9C )/ CRCDATA =  HI                         ( CRC DATA MULTIPLEXOR )        +  / /PLOENA   *   / SRQA   +   /PLOENA   *   / SRQH    / CELLCLK =  HI                            ( CLOCK MULTIPLEXOR )        +  / /HANG  *  / SREAD                          ( HANG )        +    /HANG  *  / /PLOENA  *  / 2VCLK            ( READ )        +    /HANG  *    /PLOENA  *  / 2XCLK        ( NOT READ )                                                                ( BIT COUNTER - IF ZERO IS TRUE AND COUNT IS LESS THAN 14      )( CLEARS TO ZERO. IF COUNT 14 OR 15 CLEARS TO 14.              )/ /DATA   =  /DATA  *  /ZERO              ( TOGGLE IF NOT ZERO )          +  /DATA  *  / /HANG                       ( OR HANG )/ /T1     =  /ZERO   *   / /DATA   *   /T1                                +  /ZERO   *   /DATA   *   / /T1                                +  / /ZERO    *  / /T3  *  / /T2  *  / /T1            -->                                                             ( HDC/DMA - BIT COUNTER                                     9C )                                                                / /T2     = /ZERO   *   / /DATA   *   / /T1   *   /T2                     +  /ZERO   *   /DATA   *   / /T2                                +  /ZERO   *   /T1   *   / /T2                                  +  / /ZERO    *  / /T3  *  / /T2  *  / /T1                                                                                                                                            / /T3     =  /ZERO   *  / /DATA   *  / /T1   *  / /T2   *  /T3            +  /ZERO   *   /DATA   *   / /T3                                +  /ZERO   *   /T1   *   / /T3                                  +  /ZERO   *   /T2   *   / /T3                                  +  / /ZERO    *  / /T3  *  / /T2  *  / /T1                                                                                                                                            -->                                                             ( HDC/DMA - BIT COUNTER                                     9C )                                                                                           ( BYTE IS LOW IN STATE FOLLOWING 13 )                                                                / BYTE    =  / /T3  *  / /T2  *  /T1  *  / /DATA                                                                                                              ( DBYTE LOW IF 14 OR 15 AND ZERO )                                                                / DBYTE   =  / /T3  *  / /T2  *  / /T1  *  /DATA                          +  / /T3  *  / /T2  *  / /T1  *  / /DATA  *  / /ZERO                                                                  PAL.   TWEEK                                                                                                                                                                                                                                                    LIMIT 512 0 SAVE 9C-G.DAT                        ( REV 9/30/81 )( HDC/DMA - 8X300 CONTROL DECODE PAL                       10C )                                                                PALS    10L8                                                                                                                    1. INS4                         20. VCC                         2. MCLK                         19. /DESTSTB                    3. SC                           18. /LASTENBL                   4. REGENBL                      17. /RAMENBL                    5. /RB                          16. /SRENBL                     6. BYTE                         15. /BUFCLK                     7. HALT                         14. /NEXTCLK                    8. K1                           13. /BUFENBL                    9. DBYTE                        12. /DIENBL                     10. GND                         11. K0                                                                                          -->                                                             ( HDC/DMA - 8X300 CONTROL DECODE PAL                       10C )                                                                / /BUFCLK  =  MCLK   *   SC   *   /RB                                      +  / DBYTE   *   HALT                                                                                                / /NEXTCLK =  MCLK   *   SC   *   / /RB                                                                                         / /LASTENBL = INS4   *   / SC   *   / HALT                                                                                      / /BUFENBL =  / K0   *   / K1   *   HALT   *   / SC                      +  / INS4   *   / SC   *   / HALT                                                                                      / /SRENBL  =  K0   *   / K1   *   HALT   *   / SC                                                                               / /DIENBL  =  / K0   *   K1   *   HALT   *   / SC               -->                                                             ( HDC/DMA - 8X300 CONTROL DECODE PAL                       10C )                                                                / /RAMENBL =  K0   *   K1   *   HALT   *   / SC                                                                                 / /DESTSTB =  HALT   *  / BYTE   *  REGENBL   *  / K0   *   / K1                                                                PAL.   TWEEK                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    LIMIT 512 0 SAVE 10C-E.DAT                       ( REV 9/09/81 )( HDC/DMA - IO PORT DECODE PAL                             5CB )                                                                PALS    14L4                                                                                                                    1. PHLDA                        20. VCC                         2. /POC                         19. SOUT                        3. /PWR                         11. A3                          4. A7                           18. /PRESET                     5. A5                           17. /RSTSTB                     6. A4                           16. /HLDA                       7. A0                           15. /ATTNSTB                    8. A1                           14. HLDA                        9. A6                           13. /ATTN                       10. GND                         12. A2                                                                                          -->                                                             ( HDC/DMA - IO PORT DECODE PAL                             5CB )                                                                / HLDA    =  / PHLDA                                                                                                            / /HLDA   =  PHLDA                                              ( RESET ON WRITE 124 OCTAL )                                    / /RSTSTB =  / A7  *  A6  *  / A5  *  A4  *  / A3                       *  A2  *  / A1  *  /  A0  *  SOUT  *  / /PWR                    +  / /POC  +  / /PRESET                                 ( ATTENTION ON WRITE 125 OCTAL )                                / /ATTNSTB =  / A7  *  A6  *  / A5  *  A4  *  / A3                      *  A2  *  / A1  *  A0  *  SOUT  *  / /PWR                       + / /ATTN                                               PAL.   TWEEK                                                                                                                    LIMIT 512 0 SAVE 5CB-E.DAT                        ( REV 6/3/81 )                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                ( PALS                                             MCS 81MAY28 )VOCABULARY PALS   IMMEDIATE   PALS DEFINITIONS                                                                                  0 VARIABLE TFLG       0 VARIABLE LASTOUT   0 VARIABLE INVERT    0 VARIABLE PRODUCT   32 CONSTANT -         0 VARIABLE LR                                                                        : ADDR ( INPUT --- ADDR, DATA )                                     PRODUCT @ 8 /MOD SWAP   32 * ROT + SWAP                         4 /MOD 256 * LIMIT + ROT +   SWAP PWR2 ;                                                                                    : FUSE ( INPUT ---  ) INVERT @ + 0 INVERT ! ADDR TOGGLE ;                                                                       : INPUT   <BUILDS ,                                                 DOES>   TFLG @ 0= 1201 ?ERROR   0 TFLG !                        @    FUSE ;                                                 -->                                                             ( PALS                                             MCS 81MAY28 )                                                                : +    LASTOUT @ DUP @ DUP 0= 1204 ?ERROR                           DUP + OVER + @ PRODUCT !  -1 SWAP +!                            32 0 DO I FUSE LOOP 1 TFLG ! ;                                                                                              : OUTPUT   ( T0,T1, ... ,TN,N,INPUT ---  )                          <BUILDS , DUP , 0 DO , LOOP                                     DOES> TFLG @                                                      IF @ DUP 31 > 1203 ?ERROR                 ( INPUT WANTED )        FUSE   0 TFLG !                                               ELSE 2+ LASTOUT ! INVERT @ LR @ XOR 1206 ?ERROR                 0 INVERT ! + ENDIF ;                                      : =    TFLG @ 0= 1205 ?ERROR ;                                  : /   1 INVERT ! ;                                              : *   TFLG @ 1201 ?ERROR   1 TFLG ! ; -->                       ( PALS                                             MCS 81MAY28 )                                                                : PAL.   FORTH CR 64 0 DO I PRODUCT !                               I 0 4 D.R  2 SPACES  32 0 DO I 3 AND  0= IF SPACE ENDIF           I ADDR SWAP C@ AND IF CHR - ELSE CHR X ENDIF EMIT               LOOP CR I 8 MOD 7 = IF CR ENDIF                                 ?TERMINAL IF LEAVE ENDIF LOOP ;                           : CLR   LIMIT 512 0 FILL  0 TFLG ! ;   : SKIP 32 WORD ;                                                : HI   0 TFLG ! ;        : TWK ( INPUT ---  ) PRODUCT @ SWAP ADDR OVER C@ OR SWAP C! ;                                                                   : 10H8   97 LOAD  0 LR ! ;   : 10L8   97 LOAD  1 LR ! ;         : 16R4   100 LOAD ; : 16R6   100 LOAD ; : 16R8   100 LOAD ;     : 16L8   99 LOAD ;  : 14L4   98 LOAD ;                                                                                          TRANSIENT DISCARD                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               ( PALS - 10H8 - 10L8                               MCS 81MAR29 )                                                                DISCARD   TRANSIENT DISCARD   CLR                                                                                               : 1. 2 INPUT ;  : 2. 0 INPUT ;   : 3. 4 INPUT ;  : 4. 8 INPUT ; : 5. 12 INPUT ;   : 6. 16 INPUT ;   : 7. 20 INPUT ;             : 8. 24 INPUT ;   : 9. 28 INPUT ;   : 10. 32 WORD ;             : 11. 30 INPUT ;           : 12. 56 57 2 - OUTPUT ;             : 13. 48 49 2 - OUTPUT ;   : 14. 40 41 2 - OUTPUT ;             : 15. 32 33 2 - OUTPUT ;   : 16. 24 25 2 - OUTPUT ;             : 17. 16 17 2 - OUTPUT ;   : 18. 8 9 2 - OUTPUT ;               : 19. 0 1 2 - OUTPUT ;     : 20. 32 WORD ;                                                                                      : TWEEK  8 0 DO 2 0 DO FORTH J 8 * I + PRODUCT ! PALS               6 TWK 7 TWK 10 TWK 11 TWK 14 TWK 15 TWK 18 TWK 19 TWK          22 TWK 23 TWK 26 TWK 27 TWK LOOP LOOP ;                      ( PALS - 14L4                                      MCS 81MAR29 )                                                                DISCARD   TRANSIENT DISCARD   CLR   1 LR !                                                                                      : 1. 2 INPUT ;      : 2. 0 INPUT ;      : 3. 4 INPUT ;          : 4. 8 INPUT ;      : 5. 12 INPUT ;     : 6. 16 INPUT ;         : 7. 20 INPUT ;     : 8. 24 INPUT ;     : 9. 28 INPUT ;         : 10. SKIP ;        : 11. 30 INPUT ;    : 12. 26 INPUT ;        : 13. 22 INPUT ;    : 18. 10 INPUT ;    : 19. 6 INPUT ;         : 20. SKIP ;                                                    : 14. 40 41 42 43 4 - OUTPUT ;                                  : 15. 32 33 34 35 4 - OUTPUT ;                                  : 16. 24 25 26 27 4 - OUTPUT ;                                  : 17. 16 17 18 19 4 - OUTPUT ;                                  : TWEEK 6 2 DO 4 0 DO FORTH J 8 * I + PALS PRODUCT !              14 TWK 15 TWK 18 TWK 19 TWK LOOP LOOP ;                       ( PALS - 16L8                                      MCS 81MAR29 )                                                                DISCARD   TRANSIENT DISCARD   CLR       : TWEEK ;   1 LR !                                                                      : 1. 2 INPUT ;      : 2. 0 INPUT ;      : 3. 4 INPUT ;          : 4. 8 INPUT ;      : 5. 12 INPUT ;     : 6. 16 INPUT ;         : 7. 20 INPUT ;     : 8. 24 INPUT ;     : 9. 28 INPUT ;         : 10. SKIP ;        : 11. 30 INPUT ;    : 20. SKIP ;            : 12. 56 57 58 59 60 61 62 63 8 -  OUTPUT ;                     : 13. 48 49 50 51 52 53 54 55 8 26 OUTPUT ;                     : 14. 40 41 42 43 44 45 46 47 8 22 OUTPUT ;                     : 15. 32 33 34 35 36 37 38 39 8 18 OUTPUT ;                     : 16. 24 25 26 27 28 29 30 31 8 14 OUTPUT ;                     : 17. 16 17 18 19 20 21 22 23 8 10 OUTPUT ;                     : 18.  8  9 10 11 12 13 14 15 8 6  OUTPUT ;                     : 19.  0  1  2  3  4  5  6  7 8 -  OUTPUT ;                     ( PALS - 16R4 - 16R6 - 16R8                        MCS 81MAR29 )                                                                DISCARD   TRANSIENT DISCARD   CLR       : TWEEK ;   1 LR !                                                                      : 1. SKIP ;         : 2. 0 INPUT ;      : 3. 4 INPUT ;          : 4. 8 INPUT ;      : 5. 12 INPUT ;     : 6. 16 INPUT ;         : 7. 20 INPUT ;     : 8. 24 INPUT ;     : 9. 28 INPUT ;         : 10. SKIP ;         : 11. SKIP ;        : 20. SKIP ;           : 12. 56 57 58 59 60 61 62 63 8 30 OUTPUT ;                     : 13. 48 49 50 51 52 53 54 55 8 26 OUTPUT ;                     : 14. 40 41 42 43 44 45 46 47 8 22 OUTPUT ;                     : 15. 32 33 34 35 36 37 38 39 8 18 OUTPUT ;                     : 16. 24 25 26 27 28 29 30 31 8 14 OUTPUT ;                     : 17. 16 17 18 19 20 21 22 23 8 10 OUTPUT ;                     : 18.  8  9 10 11 12 13 14 15 8 6  OUTPUT ;                     : 19.  0  1  2  3  4  5  6  7 8 2  OUTPUT ;