IF1 IFNDEF USEtempCARD USEtempCARD = 0 ; Fix so we can include file without PARMS.ASM ENDIF ENDIF if USEtempCARD IDE_BASE_ADDR EQU 0C0H else IDE_BASE_ADDR EQU 080H endif IDE_DATA EQU IDE_BASE_ADDR+0 ; data reg in/out IDE_ERR EQU IDE_BASE_ADDR+1 ; error reg in IDE_FR EQU IDE_BASE_ADDR+1 ; feature reg out IDE_SC EQU IDE_BASE_ADDR+2 ; sector count in/out IDE_SN EQU IDE_BASE_ADDR+3 ; sector number in/out IDE_CL EQU IDE_BASE_ADDR+4 ; cylinder low in/out IDE_CH EQU IDE_BASE_ADDR+5 ; cylinder high in/out IDE_DH EQU IDE_BASE_ADDR+6 ; device/head in/out IDE_STAT EQU IDE_BASE_ADDR+7 ; primary status in IDE_CMD EQU IDE_BASE_ADDR+7 ; command out if USEtempCARD ; Temporary Card Addresses IDE_LATCH EQU IDE_BASE_ADDR+10 ; high byte data in/out IDE_ASTAT EQU IDE_BASE_ADDR+14 ; alternate status in IDE_DC EQU IDE_BASE_ADDR+14 ; device control out else ;IDE_BSTAT EQU IDE_BASE_ADDR+ ; bus status in IDE_DATAOUT EQU IDE_BASE_ADDR+8 ; word data(8&9) out IDE_ASTAT EQU IDE_BASE_ADDR+10 ; alternate status in IDE_DC EQU IDE_BASE_ADDR+10 ; device control out IDE_DATAIN EQU IDE_BASE_ADDR+12 ; word data(12&13) in IDE_AC EQU IDE_BASE_ADDR+12 ; alternate control out ;IDE_DA EQU IDE_BASE_ADDR+ ; device address in endif ; error reg (IDE_ERR) bits IN CB_ER_DEV1 EQU 10000000b ; Drive 1 did not pass Diag CB_ER_PASS EQU 00000001b ; Drive 0 passed Diag CB_ER_BBK EQU 10000000b ; ATA bad block CB_ER_UNC EQU 01000000b ; ATA uncorrected error CB_ER_MC EQU 00100000b ; ATA media change CB_ER_IDNF EQU 00010000b ; ATA id not found CB_ER_MCR EQU 00001000b ; ATA media change request CB_ER_ABRT EQU 00000100b ; ATA command aborted CB_ER_NTK0 EQU 00000010b ; ATA track 0 not found CB_ER_NDAM EQU 00000001b ; ATA address mark not found CB_ER_P_SNSKEY EQU 11110000b ; ATAPI sense key (mask) CB_ER_P_MCR EQU 00001000b ; ATAPI Media Change Request CB_ER_P_ABRT EQU 00000100b ; ATAPI command abort CB_ER_P_EOM EQU 00000010b ; ATAPI End of Media CB_ER_P_ILI EQU 00000001b ; ATAPI Illegal Length Indication ; ATAPI Interrupt Reason bits in the Sector Count reg (IDE_SC) IN CB_SC_P_TAG EQU 11111000b ; ATAPI tag (mask) CB_SC_P_REL EQU 00000100b ; ATAPI release CB_SC_P_IO EQU 00000010b ; ATAPI I/O CB_SC_P_CD EQU 00000001b ; ATAPI C/D ; device/head reg (IDE_DH) bits IN/OUT CB_DH_LBA EQU 01000000b ; LBA bit CB_DH_DEV0 EQU 00000000b ; select device 0 // 10100000b (old definition) CB_DH_DEV1 EQU 00010000b ; select device 1 // 10110000b (old definition) CB_DH_HEAD EQU 00001111b ; HEAD mask ; status regs (IDE_STAT and IDE_ASTAT) bits IN ; The Alternate Status contains the same information as the Status Register ; The only difference being that reading the Alternate Status register does ; not imply interrupt acknowledge or clear a pending interrupt. Additionally, ; bits other than the BSY bit are not valid until 400ns after BSY has been cleared. CB_STAT_BSY EQU 10000000b ; busy CB_STAT_RDY EQU 01000000b ; ready CB_STAT_DF EQU 00100000b ; device fault CB_STAT_SKC EQU 00010000b ; seek complete CB_STAT_SERV EQU 00010000b ; service CB_STAT_DRQ EQU 00001000b ; data request CB_STAT_CORR EQU 00000100b ; corrected CB_STAT_IDX EQU 00000010b ; index CB_STAT_ERR EQU 00000001b ; error (ATA) CB_STAT_CHK EQU 00000001b ; check (ATAPI) ; Device control reg (IDE_DC) bits OUT CB_DC_HOB EQU 10000000b ; High Order Byte (48-bit LBA) CB_DC_HD15 EQU 00001000b ; (old definition of bit 3) CB_DC_SRST EQU 00000100b ; soft reset CB_DC_NIEN EQU 00000010b ; disable interrupts ; Device address reg (IDE_DA) bits IN ; This Register was deemed obsolete in ATA-2 ; Care should be used when interpreting these bits, as they do not always ; represent the expected status of drive operations at the instant the status was ; put into this register. This is because of the use of caching, translate mode ; and the Drive 0/Drive 1 concept with each drive having its own embedded ; controller. CB_DA_HiZ EQU 10000000b ; HiZ shall always be in a high impedance state. CB_DA_nWTG EQU 01000000b ; nWTG is the Write Gate bit. When writing to the disk drive is in Progress, nWTG=0 CB_DA_nHS3 EQU 00100000b ; CB_DA_nHS2 EQU 00010000b ; one's complement of the currently selected head CB_DA_nHS1 EQU 00001000b ; CB_DA_nHS0 EQU 00000100b ; CB_DA_nDS1 EQU 00000010b ; nDS1 active low for drive 1 CB_DA_nDS0 EQU 00000001b ; nDS0 active low for drive 0 ; Bus Status Register (IDE_BSTAT) bits IN [Proposed] CB_BSTAT_DMARQ EQU 10000000b ; DMA Request CB_BSTAT_IORDY EQU 01000000b ; I/0 Ready CB_BSTAT_CSEL EQU 00100000b ; Cable Select CB_BSTAT_INTRQ EQU 00010000b ; Interrupt Pending CB_BSTAT_IOCS16 EQU 00001000b ; 8/16 Bit I/O requested CB_BSTAT_PDIAG EQU 00000100b ; Passed Diagnostics CB_BSTAT_DASP EQU 00000010b ; Device Active CB_BSTAT_DEV1 EQU 00000001b ; Device 1 exists on bus ; Alternate Control Register (IDE_AC) bits OUT ; Drive/EEPROM Write/Wait State Latch ; U5 is a latch that is used to switch from the pair of drives on J1 to the pair on J2. ; Write xxxxxx10 for J1, xxxxxx01 for J2 to address 8Ch to select. xxxxxx11 deselects both. ; This latch also can be used to enable/disable NVsRAM writes under software control. ; Write xxxxx0xx to enable writing, xxxxx1xx to disable writing(Write Protected). ; NVsRAM write enable can be done via jumpers at J5 as well. ; Bit 3 of the latch is spare. ; Bits 4,5,6 and 7 are for programming the wait state generator. Since the motherboard ; always generates at least 1 wait state for I/O operations, values of 0 and 1 will ; have no affect. Further, if J106 on the motherboard is set for 2 or 3 wait states, ; values of 2 and/or 3 will have no affect. Because there is no way to read this latch, ; all users of this board must keep track of the desired state for these bits. CB_AC_BUS2 EQU 00000001b ; Select Secondary Bus (J2) CB_AC_BUS1 EQU 00000010b ; Select Primary Bus (J1) CB_AC_BUS0 EQU 00000011b ; Deselect both J1 and J2 CB_AC_EWPEEP EQU 00000100b ; Enable Write Protection on NVEPROM CB_AC_MASTER EQU 00001000b ; Set for Master, Unset for Slave LED CB_AC_CLOCK EQU 00001000b ; Set for Clock exists in ZFMT_FLG CB_AC_4WAITS EQU 00000000b ; 4 Wait States CB_AC_3WAITS EQU 00010000b ; 3 Wait States CB_AC_2WAITS EQU 00110000b ; 2 Wait States CB_AC_1WAITS EQU 01110000b ; 1 Wait State(no effect) CB_AC_0WAITS EQU 11110000b ; 0 Wait States(no effect) CB_AC_WAITmask EQU 11110000b ; MASK for all wait state bits ; Most mandtory and optional ATA commands (IDE_CMD), OUT CMD_CFA_ERASE_SECTORS EQU 0C0h CMD_CFA_REQUEST_EXT_ERR_CODE EQU 003h CMD_CFA_TRANSLATE_SECTOR EQU 087h CMD_CFA_WRITE_MULTIPLE_WO_ERASE EQU 0CDh CMD_CFA_WRITE_SECTORS_WO_ERASE EQU 038h CMD_CHECK_POWER_MODE1 EQU 0E5h CMD_CHECK_POWER_MODE2 EQU 098h CMD_DEVICE_RESET EQU 008h CMD_EXECUTE_DEVICE_DIAGNOSTIC EQU 090h CMD_FLUSH_CACHE EQU 0E7h CMD_FLUSH_CACHE_EXT EQU 0EAh CMD_FORMAT_TRACK EQU 050h CMD_IDENTIFY_DEVICE EQU 0ECh CMD_IDENTIFY_DEVICE_PACKET EQU 0A1h CMD_IDENTIFY_PACKET_DEVICE EQU 0A1h CMD_IDLE1 EQU 0E3h CMD_IDLE2 EQU 097h CMD_IDLE_IMMEDIATE1 EQU 0E1h CMD_IDLE_IMMEDIATE2 EQU 095h CMD_INITIALIZE_DEVICE_PARAMETERS EQU 091h CMD_NOP EQU 000h CMD_PACKET EQU 0A0h CMD_READ_BUFFER EQU 0E4h CMD_READ_DMA EQU 0C8h CMD_READ_DMA_EXT EQU 025h CMD_READ_DMA_QUEUED EQU 0C7h CMD_READ_DMA_QUEUED_EXT EQU 026h CMD_READ_MULTIPLE EQU 0C4h CMD_READ_MULTIPLE_EXT EQU 029h CMD_READ_SECTORS EQU 020h CMD_READ_SECTORS_EXT EQU 024h CMD_READ_VERIFY_SECTORS EQU 040h CMD_READ_VERIFY_SECTORS_EXT EQU 042h CMD_RECALIBRATE EQU 010h CMD_SEEK EQU 070h CMD_SET_FEATURES EQU 0EFh CMD_SET_MULTIPLE_MODE EQU 0C6h CMD_SLEEP1 EQU 0E6h CMD_SLEEP2 EQU 099h CMD_SMART EQU 0B0h CMD_STANDBY1 EQU 0E2h CMD_STANDBY2 EQU 096h CMD_STANDBY_IMMEDIATE1 EQU 0E0h CMD_STANDBY_IMMEDIATE2 EQU 094h CMD_WRITE_BUFFER EQU 0E8h CMD_WRITE_DMA EQU 0CAh CMD_WRITE_DMA_EXT EQU 035h CMD_WRITE_DMA_QUEUED EQU 0CCh CMD_WRITE_DMA_QUEUED_EXT EQU 036h CMD_WRITE_MULTIPLE EQU 0C5h CMD_WRITE_MULTIPLE_EXT EQU 039h CMD_WRITE_SECTORS EQU 030h CMD_WRITE_SECTORS_EXT EQU 034h CMD_WRITE_VERIFY EQU 03Ch ; Features reg (IDE_FR) OUT Commands when using CMD_SET_FEATURES FR_E8BIT EQU 001h ; Enable 8-bit data transfers FR_EWC EQU 002h ; Enable write cache * FR_STM EQU 003h ; Set transfer mode based on value in Sector Count register FR_DR EQU 033h ; Disable retry * FR_LEN EQU 044h ; Length of vendor specific bytes on READ LONG/WRITE LONG cmds FR_SCS EQU 054h ; Set cache segments to Sector Count register value * FR_DLA EQU 055h ; Disable read look-ahead feature FR_DPD EQU 066h ; Disable reverting to power on defaults FR_DECC EQU 077h ; Disable ECC * FR_D8BIT EQU 081h ; Disable 8-bit data transfers FR_DWC EQU 082h ; Disable write cache * FR_EECC EQU 088h ; Enable ECC * FR_ER EQU 099h ; Enable retries * FR_ELA EQU 0AAh ; Enable read look-ahead feature FR_SMP EQU 0ABh ; Set maximum prefetch using Sector Count register value * FR_D4B EQU 0BBh ; 4 bytes of vendor specific byts on READ LONG/WRITE LONG cmds FR_EPD EQU 0CCh ; Enable reverting to power on defaults ; A host can choose the transfer mechanism by Set Transfer Mode and specifying a value in the Sector Count ; register. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. ; PIO Default Transfer Mode 00000 000 ; PIO Default Transfer Mode, Disable IORDY 00000 001 ; PIO Flow Control Transfer Mode x 00001 xxx ; Single word DMA mode x (ATA-1) 00010 0xx ; Multiword DMA mode x 00100 xxx ; Ultra DMA mode x 01000 xxx PIO_DEFAULT_MODE EQU 00000000B PIO_FLOW_MODE EQU 00001000B ; Where nnn is a valid mode number in binary and x is the mode number in decimal for the associated ; transfer type. ; PIO Mode 0 is the speed of the 8-bit "ISA" bus in the original IBM PC and PC/XT(3.3MB/s). ; PIO Mode 1 is the speed of the 16-bit ISA bus in the original 6MHz IBM PC/AT(5.2MB/s). ; PIO Mode 2 is the speed of the 16-bit ISA bus in the 8MHz IBM PC/AT(8.3MB/s). ; PIO Mode 3 is (11.1MB/s). ; PIO Mode 4 is (16.7MB/s). ; Identify Device information (words) ; 0 General configuration bit-significant information: ; 15 0 reserved for non-magnetic devices ; 14 1=format speed tolerance gap required ; 13 1=track offset option available ; 12 1=data strobe offset option available ; 11 1=rotational speed tolerance is > 0,5% ; 10 1=disk transfer rate > 10 Mbs ; 9 1=disk transfer rate > 5Mbs but <= 10Mbs ; 8 1=disk transfer rate <= 5Mbs ; 7 1=removable cartridge drive ; 6 1=fixed drive ; 5 1=spindle motor control option implemented ; 4 1=head switch time > 15 usec ; 3 1=not MFM encoded ; 2 1=soft sectored ; 1 1=hard sectored ; 0 0=reserved ; 1 Number of logical cylinders(Retired ATA-7) ID_CYLS EQU 1*2 ; 2 Specific configuration(ATA-5) ; 37C8h Device requires SET FEATURES subcommand to spin-up after power-up ; and IDENTIFY DEVICE response is incomplete ; 738Ch Device requires SET FEATURES subcommand to spin-up after power-up ; and IDENTIFY DEVICE response is complete ; 8C73h Device does not require SET FEATURES subcommand to spin-up after ; power-up and IDENTIFY DEVICE response is incomplete ; C837h Device does not require SET FEATURES subcommand to spin-up after ; power-up and IDENTIFY DEVICE response is complete ; 3 Number of logical heads(Retired ATA-7) ID_HEADS EQU 3*2 ; 4 Number of unformatted bytes per track(Retired ATA-2) ; 5 Number of unformatted bytes per sector(Retired ATA-2) ; 6 Number of logical sectors per logical track(Retired ATA-7) ID_SPT EQU 6*2 ; 7-8 Reserved for assignment by the CompactFlash Association ; 9 Vendor unique (Retired) ; 10-19 Serial number (20 ASCII characters) ID_SERIAL EQU 10*2 ; 20 Buffer type(Retired ATA-2) ; 0000h = not specified. ; 0001h = a single ported single sector buffer which is not capable ; of simultaneous data transfers to or from the host and the disk ; 0002h = a dual ported multi-sector buffer capable of simultaneous ; data transfers to or from the host and the disk. ; 0003h = a dual ported multi-sector buffer capable of simultaneous ; transfers with a read caching capability. ; 21 Buffer size in 512 byte increments (0000h=not specified)(Retired ATA-2) ; 22 # of vendor specific bytes avail on READ/WRITE LONG cmds(Retired ATA-4) ; 23-26 Firmware revision (8 ASCII characters) ID_FIRMWARE EQU 23*2 ; 27-46 Model number (40 ASCII characters) ID_MODEL EQU 27*2 ; 47 15-8 Vendor specific ; 7-0 00h=READ/WRITE MULTIPLE commands not implemented ; 01h-FFh = Maximum number of sectors that can be transferred per ; interrupt on READ MULTIPLE and WRITE MULTIPLE commands ID_MULTIPLE EQU 47*2 ; 48 DoubleWord I/O (Retired ATA-2) ; 0000h = cannot perform doubleword I/O ; 0001h = can perform doubleword I/O ; 49 Capabilities ; 15-14 Reserved for the IDENTIFY PACKET DEVICE command. ; 13 1=Standby timer values as specified in this standardare supported ; 0=Standby timer values are vendor specific ; 12 Reserved (for advanced PIO mode support) ; 11 1=IORDY supported ; 0=IORDY may be supported ; 10 1=IORDY can be disabled ; 9 1=LBA supported ; 8 1=DMA supported ; 7-0 Vendor specific ID_CAPABIL EQU 49*2 ; 50 Capabilities ; 15 Shall be cleared to zero. ; 14 Shall be set to one. ; 13-1 Reserved. ; 0 Set to one to indicate a device specific Standby timer value minimum ; 51 15-8 PIO data transfer cycle timing mode(Retired ATA-5) ; 7-0 Vendor specific ID_PIOxferMODE EQU 51*2 ; 52 15-8 DMA data transfer cycle timing mode(Retired ATA-3) ; 7-0 Vendor specific ; 53 15-3 Reserved ; 2 1 = the fields reported in word 88 are valid ; 0 = the fields reported in word 88 are not valid ; 1 1=the fields reported in words 64-70 are valid ; 0=the fields reported in words 64-70 are not valid ; 0 1=the fields reported in words 54-58 are valid ; 0=the fields reported in words 54-58 may be valid ID_VALID54_64 EQU 53*2 ; 54 Number of current logical cylinders ; 55 Number of current logical heads ; 56 Number of current logical sectors per track ; 57-58 Current capacity in sectors ; 59 15-9 Reserved ; 8 1 = Multiple sector setting is valid ; 7-0h xxh = Current setting for number of sectors that can be ; transferred per interrupt on R/W multiple command ; 60-61 Total number of user addressable sectors (LBA mode only) ID_TotalLBAsecs EQU 60*2 ; 62 15-8 Single word DMA transfer mode active ; 7-0 Single word DMA transfer modes supported ; 63 15-11 Reserved ; 10 1 = Multiword DMA mode 2 is selected ; 0 = Multiword DMA mode 2 is not selected ; 9 1 = Multiword DMA mode 1 is selected ; 0 = Multiword DMA mode 1 is not selected ; 8 1 = Multiword DMA mode 0 is selected ; 0 = Multiword DMA mode 0 is not selected ; 7-3 Reserved ; 2 1 = Multiword DMA mode 2 and below are supported ; 1 1 = Multiword DMA mode 1 and below are supported ; 0 1 = Multiword DMA mode 0 is supported ; 64 15-8 Reserved ; 7-2 Advanced PIO modes support ; 1 PIO mode 4 support ; 0 PIO mode 3 support ID_PIOmode34 EQU 64*2 ;*** END ATA-1 *** ; 65 Minimum Multiword DMA Transfer Cycle Time Per Word ; 15-0 Cycle time in nanoseconds ; 66 Manufacturer’s Recommended Multiword DMA Transfer Cycle Time ; 15-0 Cycle time in nanoseconds ; 67 Minimum PIO Transfer Cycle Time Without Flow Control ; 15-0 Cycle Time in nanoseconds ; 68 Minimum PIO Transfer Cycle Time With IORDY Flow Control ; 15-0 Cycle Time in nanoseconds ;*** END ATA-2 *** ; 69-70 F Reserved (for future command overlap and queuing) ; 71-74 F Reserved for IDENTIFY PACKET DEVICE command. ; 75 O Queue depth ; 15-5 Reserved ; 4-0 Maximum queue depth - 1 ; 76-79 F Reserved for Serial ATA ; 80 Major version number ; 0000h or FFFFh = device does not report version ; 15 Reserved ; 14 Reserved for ATA/ATAPI-14 ; 13 Reserved for ATA/ATAPI-13 ; 12 Reserved for ATA/ATAPI-12 ; 11 Reserved for ATA/ATAPI-11 ; 10 Reserved for ATA/ATAPI-10 ; 9 Reserved for ATA/ATAPI-9 ; 8 Reserved for ATA/ATAPI-8 ; 7 1 = supports ATA/ATAPI-7 ; 6 1 = supports ATA/ATAPI-6 ; 5 1 = supports ATA/ATAPI-5 ; 4 1 = supports ATA/ATAPI-4 ; 3 1 = supports ATA-3 ; 2 1 = supports ATA-2 ; 1 1 = supports ATA-1 ; 0 Reserved ; 81 F Minor version number ; 0000h or FFFFh = device does not report version ; 0001h ATA (ATA-1) X3T9.2 781D prior to revision 4 ; 0002h ATA-1 published, ANSI X3.221-1994 ; 0003h ATA (ATA-1) X3T10 781D revision 4 ; 0004h ATA-2 published, ANSI X3.279-1996 ; 0005h ATA-2 X3T10 948D prior to revision 2k ; 0006h ATA-3 X3T10 2008D revision 1 ; 0007h ATA-2 X3T10 948D revision 2k ; 0008h ATA-3 X3T10 2008D revision 0 ; 0009h ATA-2 X3T10 948D revision 3 ; 000Ah ATA-3 published, ANSI X3.298-199x ; 000Bh ATA-3 X3T10 2008D revision 6 ; 000Ch ATA-3 X3T13 2008D revision 7 and 7a ; 000Dh ATA/ATAPI-4 X3T13 1153D revision 6 ; 000Eh ATA/ATAPI-4 T13 1153D revision 13 ; 000Fh ATA/ATAPI-4 X3T13 1153D revision 7 ; 0010h ATA/ATAPI-4 T13 1153D revision 18 ; 0011h ATA/ATAPI-4 T13 1153D revision 15 ; 0012h ATA/ATAPI-4 published, ANSI INCITS 317-1998 ; 0013h ATA/ATAPI-5 T13 1321D revision 3 ; 0014h ATA/ATAPI-4 T13 1153D revision 14 ; 0015h ATA/ATAPI-5 T13 1321D revision 1 ; 0016h ATA/ATAPI-5 published, ANSI INCITS 340-2000 ; 0017h ATA/ATAPI-4 T13 1153D revision 17 ; 0018h ATA/ATAPI-6 T13 1410D revision 0 ; 0019h ATA/ATAPI-6 T13 1410D revision 3a ; 001Ah ATA/ATAPI-7 T13 1532D revision 1 ; 001Bh ATA/ATAPI-6 T13 1410D revision 2 ; 001Ch ATA/ATAPI-6 T13 1410D revision 1 ; 001Dh Reserved ; 001Eh ATA/ATAPI-7 T13 1532D revision 0 ;*** END ATA-3 *** ; 82 Command set supported. If words 82, 83, and 84 = 0000h or FFFFh ; command set notification extension is not supported. ; 15 Obsolete ; 14 1 = NOP command supported ; 13 1 = READ BUFFER command supported ; 12 1 = WRITE BUFFER command supported ; 11 Obsolete ; 10 1 = Host Protected Area feature set supported ; 9 1 = DEVICE RESET command supported ; 8 1 = SERVICE interrupt supported ; 7 1 = release interrupt supported ; 6 1 = look-ahead supported ; 5 1 = write cache supported ; 4 Shall be cleared to zero ; 3 1 = supports Power Management feature set ; 2 1 = supports Removable Media feature set ; 1 1 = supports Security Mode feature set ; 0 1 = supports SMART feature set ; 83 Command sets supported. ; 15 Shall be cleared to zero ; 14 Shall be set to one ; 13-9 Reserved ; 8 1 = SET MAX security extension supported ; 7 Reserved for project 1407DT Address Offset Reserved Area Boot ; 6 1 = SET FEATURES subcommand required to spinup after power-up ; 5 1 = Power-Up In Standby feature set supported ; 4 1 = Removable Media Status Notification feature set supported ; 3 1 = Advanced Power Management feature set supported ; 2 1 = CFA feature set supported ; 1 1 = READ/WRITE DMA QUEUED supported ; 0 1 = DOWNLOAD MICROCODE command supported ; 84 Command set/feature supported extension. ; 15 Shall be cleared to zero ; 14 Shall be set to one ; 13-0 Reserved ; 85 Command set/feature enabled. If words 85, 86, and 87 = 0000h or FFFFh ; command set enabled notification is not supported. ; 15 Obsolete ; 14 1 = NOP command enabled ; 13 1 = READ BUFFER command enabled ; 12 1 = WRITE BUFFER command enabled ; 11 Obsolete ; 10 1 = Host Protected Area feature set enabled ; 9 1 = DEVICE RESET command enabled ; 8 1 = SERVICE interrupt enabled ; 7 1 = release interrupt enabled ; 6 1 = look-ahead enabled ; 5 1 = write cache enabled ; 4 Shall be cleared to zero ; 3 1 = Power Management feature set enabled ; 2 1 = Removable Media feature set enabled ; 1 1 = Security Mode feature set enabled ; 0 1 = SMART feature set enabled ; 86 Command set/feature enabled. ; 15-9 Reserved ; 8 1 = SET MAX security extension enabled by SET MAX SET PASSWORD ; 7 Reserved for project 1407DT Address Offset Reserved Area Boot ; 6 1 = SET FEATURES subcommand required to spin-up after power-up ; 5 1 = Power-Up In Standby feature set enabled ; 4 1 = Removable Media Status Notification feature set enabled ; 3 1 = Advanced Power Management feature set enabled ; 2 1 = CFA feature set enabled ; 1 1 = READ/WRITE DMA QUEUED command supported ; 0 1 = DOWNLOAD MICROCODE command supported ; 87 Command set/feature default. ; 15 Shall be cleared to zero ; 14 Shall be set to one ; 13-0 Reserved ; 88 15 Reserved ; 14 1 = Ultra DMA mode 6 is selected ; 0 = Ultra DMA mode 6 is not selected ; 13 1 = Ultra DMA mode 5 is selected ; 0 = Ultra DMA mode 5 is not selected ; 12 1 = Ultra DMA mode 4 is selected ; 0 = Ultra DMA mode 4 is not selected ; 11 1 = Ultra DMA mode 3 is selected ; 0 = Ultra DMA mode 3 is not selected ; 10 1 = Ultra DMA mode 2 is selected ; 0 = Ultra DMA mode 2 is not selected ; 9 1 = Ultra DMA mode 1 is selected ; 0 = Ultra DMA mode 1 is not selected ; 8 1 = Ultra DMA mode 0 is selected ; 0 = Ultra DMA mode 0 is not selected ; 7 Reserved ; 6 1 = Ultra DMA mode 6 and below are supported ; 5 1 = Ultra DMA mode 5 and below are supported ; 4 1 = Ultra DMA mode 4 and below are supported ; 3 1 = Ultra DMA mode 3 and below are supported ; 2 1 = Ultra DMA mode 2 and below are supported ; 1 1 = Ultra DMA mode 1 and below are supported ; 0 1 = Ultra DMA mode 0 is supported ; 89 Time required for security erase unit completion ; 90 Time required for Enhanced security erase completion ; 91 Current advanced power management value ; ;*** END ATA-4 *** ; 92 Master Password Revision Code ; 93 Hardware reset result. The contents of bits (12:0) of this word shall ; change only during the execution of a hardware reset. ; 15 Shall be cleared to zero. ; 14 Shall be set to one. ; 13 1 = device detected CBLID- above ViH ; 0 = device detected CBLID- below ViL ; 12-8 Device 1 hardware reset result. Device 0 shall clear these bits to ; zero. Device 1 shall set these bits as follows: ; 12 Reserved. ; 11 0 = Device 1 did not assert PDIAG-. ; 1 = Device 1 asserted PDIAG-. ; 10-9 These bits indicate how Device 1 determined the device number: ; 00 = Reserved. ; 01 = a jumper was used. ; 10 = the CSEL signal was used. ; 11 = some other method was used or the method is unknown. ; 8 Shall be set to one. ; 7-0 Device 0 hardware reset result. Device 1 shall clear these bits ; to zero. Device 0 shall set these bits as follows: ; 7 Reserved. ; 6 0 = Device 0 does not respond when Device 1 is selected. ; 1 = Device 0 responds when Device 1 is selected. ; 5 0 = Device 0 did not detect the assertion of DASP-. ; 1 = Device 0 detected the assertion of DASP-. ; 4 0 = Device 0 did not detect the assertion of PDIAG-. ; 1 = Device 0 detected the assertion of PDIAG-. ; 3 0 = Device 0 failed diagnostics. ; 1 = Device 0 passed diagnostics. ; 2-1 These bits indicate how Device 0 determined the device number: ; 00 = Reserved. ; 01 = a jumper was used. ; 10 = the CSEL signal was used. ; 11 = some other method was used or the method is unknown. ; 0 Shall be set to one. ; ;*** END ATA-5 *** ; 94 15-8 Vendor’s recommended acoustic management value ; 7-0 Current automatic acoustic management value. ; 95 Stream Minimum Request Size ; 96 Streaming Transfer Time - DMA ; 97 Streaming Access Latency - DMA and PIO ; 98-99 Streaming Performance Granularity ; 100-103 Maximum user LBA for 48-bit Address feature set. ; 104 Streaming Transfer Time - PIO ; 105 Reserved ; 106 Physical sector size / Logical Sector Size ; 15 Shall be cleared to zero ; 14 Shall be set to one ; 13 1 = Device has multiple logical sectors per physical sector. ; 12 1= Device Logical Sector Longer than 256 Words ; 11-4 Reserved ; 3-0 2**X logical sectors per physical sector ; 107 Inter-seek delay for ISO-7779 acoustic testing in microseconds ; 108 15-12 NAA (3:0) ; 11-0 IEEE OUI (23:12) ; 109 15-4 IEEE OUI (11:0) ; 3-0 Unique ID (35:32) ; 110 15-0 Unique ID (31:16) ; 111 15-0 Unique ID (15:0) ; 112-115 Reserved for 128 bit world wide name ; 116 The time in 10 msec increments for the Command Completion ; Timer in the Time-limited Read/write feature set ; 117-118 Words per Logical Sector ; 119-126 Reserved ; 127 Removable Media Status Notification feature set support ; 15-2 Reserved ; 1-0 00 = Removable Media Status Notification feature not supported ; 01 = Removable Media Status Notification feature supported ; 10 = Reserved ; 11 = Reserved ; 128 Security status ; 15-9 Reserved ; 8 Security level 0 = High, 1 = Maximum ; 7-6 Reserved ; 5 1 = Enhanced security erase supported ; 4 1 = Security count expired ; 3 1 = Security frozen ; 2 1 = Security locked ; 1 1 = Security enabled ; 0 1 = Security supported ; 129-159 Vendor specific ; 160 CFA power mode 1 ; 15 Word 160 supported ; 14 Reserved ; 13 CFA power mode 1 is required for commands implemented by the device ; 12 CFA power mode 1 disabled ; 11-0 Maximum current in ma ; 161-175 Reserved for assignment by the CompactFlash Association ; 176-205 Current media serial number ; 206-254 Reserved ID_1ST_IDSKptr EQU 206*2 ; We use this Unused area in INIT ID_UNFORMATTED EQU 207*2 ; TRUE if UNFORMATTED ID_PHYDEV EQU 208*2 ; Relitive device # ID_1ST_PART EQU 209*2 ; DI offset for 1st Partition assigned ID_EMBR1 EQU 210*2 ; Offset for 1st Extended partition (Double Word) ; 255 Integrity word ; 15-8 Checksum ; 7-0 Signature (0A5h) ; Start of info returned by Generic IOCTL IDSK_SPFUN EQU 0 ;Special functions(00) IDSK_SPF0 EQU 00000001B ; Set if function to use current BPB, clear if Device ; BIOS Parameter Block field contains new default BPB IDSK_SPF1 EQU 00000010B ; Use track layout fields(not used) IDSK_SPF2 EQU 00000100B ; All sectors same size IDSK_SPF3 EQU 00001000B ; IDSK_SPF4 EQU 00010000B ; IDSK_SPF5 EQU 00100000B ; IDSK_SPF6 EQU 01000000B ; IDSK_SPF7 EQU 10000000B ; IDSK_DEVTYPE EQU IDSK_SPFUN+1 ;Device type field(01) IDSK_DEVT0 EQU 0 ; 320K/360K disk IDSK_DEVT1 EQU 1 ; 1.2M disk IDSK_DEVT2 EQU 2 ; 720K disk IDSK_DEVT3 EQU 3 ; single-density 8-inch disk IDSK_DEVT4 EQU 4 ; double-density 8-inch disk IDSK_DEVT5 EQU 5 ; fixed disk IDSK_DEVT6 EQU 6 ; tape drive IDSK_DEVT7 EQU 7 ; 1.44M disk IDSK_DEVT8 EQU 8 ; read/write optical IDSK_DEVT9 EQU 9 ; 2.88M disk IDSK_DEVT10 EQU 10 ; Other type of block device IDSK_DEVATTR EQU IDSK_DEVTYPE+1 ;Device Attribute field(02) IDSK_DEVA_NR EQU 0000000000000001B ; Set if non removeable media IDSK_DEVA_CL EQU 0000000000000010B ; Set if door lock supported IDSK_DEVA_LBPB EQU 0000000000000100b ; Current BPB locked IDSK_DEVA_GTRK EQU 0000000000001000b ; All sectors in a track are the same size IDSK_DEVA_MULT EQU 0000000000010000b ; If more than one logical for this physical IDSK_DEVA_OWN EQU 0000000000100000b ; Signify logical owner of this physical IDSK_DEVA_CHG EQU 0000000001000000b ; Indicates media changed from door lock IDSK_DEVA_DASD EQU 0000000010000000b ; Set DASD before next format IDSK_DEVA_FDC EQU 0000000100000000b ; Media changed by format IDSK_DEVA_AFLG EQU 0000001000000000b ; MSDOS Access Disabled Flag IDSK_DEVA_VBPB EQU 0000010000000000b ; Valid BPB in track 0 IDSK_DEVA_ASGN EQU 0000100000000000b ; Assigned Partition IDSK_DEVA_1000 EQU 0001000000000000b ; IDSK_DEVA_2000 EQU 0010000000000000b ; IDSK_DEVA_4000 EQU 0100000000000000b ; IDSK_DEVA_8000 EQU 1000000000000000b ; IDSK_DEVATTR1 EQU IDSK_DEVATTR+1 ; Byte access to top half IDSK_FDC EQU 00000001b ; Force Disk Change IDSK_ACFLG EQU 00000010b ; MSDOS Access Disabled Flag IDSK_VBPB EQU 00000100b ; Valid BPB in track 0 IDSK_ASGN EQU 00001000b ; Assigned Partition IDSK_CYLINDERS EQU IDSK_DEVATTR+2 ;Max Cylinders supported on logical device(04) IDSK_MEDIATYPE EQU IDSK_CYLINDERS+2 ;Media Type field(Not 1.2M always 0)(06) IDSK_MEDT0 EQU 0 ; 1.2M disk(default 1.2M drive) IDSK_MEDT1 EQU 1 ; 320/360K disk ; Start of BPB info from boot loader IDSK_SECSZ EQU IDSK_MEDIATYPE+1 ;Sector size(07) IDSK_SPAU EQU IDSK_SECSZ+2 ;Sectors per allocation unit(09) IDSK_RES EQU IDSK_SPAU+1 ;Reserved sectors(0A) IDSK_NFATS EQU IDSK_RES+2 ;Number of FAT's (file alloc tables)(0C) IDSK_DIRENTS EQU IDSK_NFATS+1 ;Number of directory entries(0D) IDSK_SECS EQU IDSK_DIRENTS+2 ;Number of sectors(0F) IDSK_MBYTE EQU IDSK_SECS+2 ;Media byte(11) IDSK_FATSECS EQU IDSK_MBYTE+1 ;Number of sectors occupied by a FAT(12) IDSK_SPT EQU IDSK_FATSECS+2 ;Number of sectors per track(14) IDSK_HEADS EQU IDSK_SPT+2 ;Number of heads/sides on drive/media(16) IDSK_HIDSEC EQU IDSK_HEADS+2 ;Number of hidden sectors on media(Base Sector)(18) IDSK_TSEC EQU IDSK_HIDSEC+4 ;If BPB_SEC=0, Total # of sectors in medium(1C) IDSK_PHYDRV EQU IDSK_TSEC+4 ;Relitive Physical drive number(20) IDSK_FILL EQU IDSK_PHYDRV+1 ;Reserved - Our Relitive Mini-Disk # (21) IDSK_EBS EQU IDSK_FILL+1 ;Extended boot signature record(29h)(22) ; Start of info returned by Get Volume Serial # IDSK_VOLID EQU IDSK_EBS+1 ;32 Bit binary volume ID(23) IDSK_VOLAB EQU IDSK_VOLID+4 ;11 Byte Volume Label(27) IDSK_FATID EQU IDSK_VOLAB+11 ;8 Byte FAT12 or FAT16 Label(32) ; Start of Partition IDE Specific Information IDSK_SSSC EQU IDSK_FATID+8 ;Logical to Physical Sector Size Shift Count(3A) IDSK_EXTBASE EQU IDSK_SSSC+2 ;Physical offset from Start of Mini Disk IDSK_SECLCYL EQU IDSK_EXTBASE+4 ;# of logical Sectors per logical cylinder IDSK_PDSK_PTR EQU IDSK_SECLCYL+2 ;Ptr to Physical DSK Table IDSK_SIZE EQU IDSK_PDSK_PTR+2 ;Size of each Partition DSK Table ; Start of Physical IDE Device Specific Information PDSK_CTRLFLG EQU 0 ;Control Flag Word or Byte PDSK_CF_J2 EQU 0000000000000001b ; J2 Connector PDSK_CF_J1 EQU 0000000000000010b ; J1 Connector PDSK_CF_EPWE EQU 0000000000000100b ; Eprom Write Enable PDSK_CF_MASTER EQU 0000000000001000b ; Set for Master, Unset for Slave PDSK_CF_WAITS EQU 0000000011110000b ; # of Wait States mask PDSK_CF_IDP EQU 1000000000000000b ; Device Supports Init Dev Parms PDSK_CF_LBA EQU 0100000000000000b ; Device Supports Logical Block Addressing PDSK_CF_20 EQU 0010000000000000b ; PDSK_CF_D01 EQU 0001000000000000b ; Device 0 or 1 select bit PDSK_CF_8 EQU 0000100000000000b ; PDSK_CF_4 EQU 0000010000000000b ; PDSK_CF_2 EQU 0000001000000000b ; PDSK_CF_1 EQU 0000000100000000b ; PDSK_CTRLFLG1 EQU PDSK_CTRLFLG+1 ;Second Half When accessed as byte PDSK_CF1_IDP EQU 10000000B ; Device Supports Init Dev Parms PDSK_CF1_LBA EQU 01000000b ; Device Supports Logical Block Addressing PDSK_CF1_20 EQU 00100000B ; PDSK_CF1_D01 EQU 00010000b ; Device 0 or 1 select bit PDSK_CF1_8 EQU 00001000b ; PDSK_CF1_4 EQU 00000100b ; PDSK_CF1_2 EQU 00000010b ; PDSK_CF1_1 EQU 00000001b ; PDSK_PHYSPH EQU PDSK_CTRLFLG+2 ;Physical # of Sectors Per Head 1 based PDSK_PHYHEADS EQU PDSK_PHYSPH+1 ;Physical # of Heads per Cylinder 1 based PDSK_SECPCYL EQU PDSK_PHYHEADS+1 ;# Sectors Per Physical Cylinder PDSK_MR_CMD EQU PDSK_SECPCYL+2 ;Multiple Read Command Code PDSK_MW_CMD EQU PDSK_MR_CMD+1 ;Multiple Write Command Code PDSK_BLKWRDS EQU PDSK_MW_CMD+1 ;# of WORDS per block PDSK_LBA_SECS EQU PDSK_BLKWRDS+2 ;Total # of Sectors on Device PDSK_LOG_SPT EQU PDSK_LBA_SECS+4 ;Logical # of Sectors Per Head 1 based PDSK_LOG_HEADS EQU PDSK_LOG_SPT+1 ;Logical # of Heads Per Cylinder 1 based PDSK_LOG_CYLS EQU PDSK_LOG_HEADS+1 ;Logical Total # of Cylinders 1 based PDSK_SIZE EQU PDSK_LOG_CYLS+2 ;Size of each Physical DSK Table