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_Ќ _-23 #0.0“ 20% - Akzent1’M’џ 20% - Akzent1 efлхёџ џ%“ 20% - Akzent2’M’"џ 20% - Akzent2 efђнмџ џ%“ 20% - Akzent3’M’&џ 20% - Akzent3 efъёнџ џ%“ 20% - Akzent4’M’*џ 20% - Akzent4 efхрьџ џ%“ 20% - Akzent5’M’.џ 20% - Akzent5 efлюѓџ џ%“ 20% - Akzent6’M’2џ 20% - Akzent6  ef§щйџ џ%“ 40% - Akzent1’M’џ 40% - Akzent1 ЬLИЬфџ џ%“ 40% - Akzent2’M’#џ 40% - Akzent2 ЬLцЙИџ џ%“ 40% - Akzent3’M’'џ 40% - Akzent3 ЬLзфМџ џ%“ 40% - Akzent4’M’+џ 40% - Akzent4 ЬLЬРкџ џ%“ 40% - Akzent5’M’/џ 40% - Akzent5 ЬLЖншџ џ%“ 40% - Akzent6’M’3џ 40% - Akzent6  ЬLќеДџ џ%“ 60% - Akzent1’M’ џ 60% - Akzent1 23•Гзџ џџџџ%“ 60% - Akzent2’M’$џ 60% - Akzent2 23й—•џ џџџџ%“ 60% - Akzent3’M’(џ 60% - Akzent3 23Тжšџ џџџџ%“ 60% - Akzent4’M’,џ 60% - Akzent4 23ВЁЧџ џџџџ%“ 60% - Akzent5’M’0џ 60% - Akzent5 23“Энџ џџџџ%“! 60% - Akzent6’M’4џ 60% - Akzent6  23њРџ џџџџ%“ "Akzent1’A’џAkzent1 OНџ џџџџ%“ #Akzent2’A’!џAkzent2 РPMџ џџџџ%“ $Akzent3’A’%џAkzent3 ›ЛYџ џџџџ%“ %Akzent4’A’)џAkzent4 €dЂџ џџџџ%“ &Akzent5’A’-џAkzent5 KЌЦџ џџџџ%“ 'Akzent6’A’1џAkzent6  ї–Fџ џџџџ%“ (Ausgabe’y’џAusgabe џђђђџ џ???џ%џ???џџ???џџ???џ џ???џ“) Berechnung’’џ Berechnung џђђђџ џњ}џ%џџџџџџ џџ“*€џ’$’џDezimal“+€џ’,’џ Dezimal [0]“ ,Eingabe’y’џEingabe џџЬ™џ џ??vџ%џџџџџџ џџ“ -Ergebnis’S’џErgebnis џ%OНџOНџ“.Erklфrender Text’G’5џErklфrender Text џџ%“/Gut’9’џGut џЦяЮџ џaџ%“ 0Neutral’A’џNeutral џџыœџ џœeџ%“ 1Notiz’d’ џNotiz џџџЬџџВВВџџВВВџџВВВџ џВВВџ“2€џ’$’џProzent“ 3Schlecht’C’џSchlecht џџЧЮџ џœџ%“€џ’7’џStandard џ%“4 мberschrift’=’џ мberschrift I}џ%“5 мberschrift 1’O’џ мberschrift 1 I}џ%OНџ“6 мberschrift 2’O’џ мberschrift 2 I}џ%џ?ЈРоџ“7 мberschrift 3’O’џ мberschrift 3 I}џ%23•Гзџ“8 мberschrift 4’A’џ мberschrift 4 I}џ%“9Verknќpfte Zelle’U’џVerknќpfte Zelle џњ}џ%џџ€џ“:€џ’$’џWфhrung“;€џ’,’џ Wфhrung [0]“<Warnender Text’C’ џWarnender Text џџџ%“=Zelle ќberprќfen’‹’џZelle ќberprќfen џЅЅЅџ џџџџ%џ???џџ???џџ???џ џ???џŽXŽTableStyleMedium9PivotStyleLight16`…BSSheet1…žrSheet2…:tSheet3ššЃЃŒ11ССыќ +ЖZ80 Opcode ListingZ-80 CPU Instruction Set---- --- ----------- ----ADD HL,ss Add register pair ss to HL.-ADD IX,pp Add register pair pp to IX.-ADD IY,rr Add register pair rr to IY.:AND s Logical AND of operand s to accumulator..BIT b,(HL) Test bit b of location (HL).0BIT b,(IX+d) Test bit b of location (IX+d).0BIT b,(IY+d) Test bit b of location (IY+d).+BIT b,r Test bit b of register r.ICALL cc,nn Call subroutine at location nn if condition CC is true.(CCF Complement carry flag.5CP s Compare operand s with accumulator.FCPD Comapre location (HL) and acc., decrement HL and BC,6CPDR Perform a CPD and repeat until BC=0.CCPI Compare location (HL) and acc., incr HL, decr BC.6CPIR Perform a CPI and repeat until BC=0.:CPL Complement accumulator (1's complement).-DAA Decimal adjust accumulator.&DEC m Decrement operand m.DEC IX Decrement IX.DEC IY Decrement IY.-DEC ss Decrement register pair ss.%DI Disable interrupts.7DJNZ e Decrement B and jump relative if B=0.$EI Enable interrupts.4EX (SP),HL Exchange the location (SP) and HL.4EX (SP),IX Exchange the location (SP) and IX.4EX (SP),IY Exchange the location (SP) and IY.6EX AF,AF' Exchange the contents of AF and AF'.5EX DE,HL Exchange the contents of DE and HL.EEXX Exchange the contents of BC,DE,HL with BC',DE',HL'.7HALT Halt computer and wait for interrupt.'IM 0 Set interrupt mode 0.'IM 1 Set interrupt mode 1.'IM 2 Set interrupt mode 2.@IN A,(n) Load the accumulator with input from device n.AIN r,(c) Load the register r with input from device (C).*INC (HL) Increment location (HL).INC IX Increment IX.,INC (IX+d) Increment location (IX+d).INC IY Increment IY.,INC (IY+d) Increment location (IY+d).'INC r Increment register r.-INC ss Increment register pair ss.?IND (HL)=Input from port (C). Decrement HL and B.6INDR Perform an IND and repeat until B=0.;INI (HL)=Input from port (C). HL=HL+1. B=B-1.6INIR Perform an INI and repeat until B=0.6JP (HL) Unconditional jump to location (HL).6JP (IX) Unconditional jump to location (IX).6JP (IY) Unconditional jump to location (IY).>JP cc,nn Jump to location nn if condition cc is true.3JR C,e Jump relative to PC+e if carry=1.6JR e Unconditional jump relative to PC+e.3JR NC,e Jump relative to PC+e if carry=0.:JR NZ,e Jump relative to PC+e if non zero (Z=0).6JR Z,e Jump relative to PC+e if zero (Z=1).6LD A,(BC) Load accumulator with location (BC).6LD A,(DE) Load accumulator with location (DE).*LD A,I Load accumulator with I.4LD A,(nn) Load accumulator with location nn.*LD A,R Load accumulator with R.6LD (BC),A Load location (BC) with accumulator.6LD (DE),A Load location (DE) with accumulator.6LD (HL),A Load location (HL) with accumulator.0LD dd,nn Load register pair dd with nn.;LD dd,(nn) Load register pair dd with location (nn).-LD HL,(nn) Load HL with location (nn).5LD (HL),r Load location (HL) with register r.*LD I,A Load I with accumulator.(LD IX,nn Load IX with value nn.-LD IX,(nn) Load IX with location (nn)..LD (IX+d),n Load location (IX+d) with n.7LD (IX+d),r Load location (IX+d) with register r.(LD IY,nn Load IY with value nn.-LD IY,(nn) Load IY with location (nn).4LD (IY+d),n Load location (IY+d) with value n.7LD (IY+d),r Load location (IY+d) with register r.6LD (nn),A Load location (nn) with accumulator.;LD (nn),dd Load location (nn) with register pair dd.-LD (nn),HL Load location (nn) with HL.-LD (nn),IX Load location (nn) with IX.-LD (nn),IY Load location (nn) with IY.*LD R,A Load R with accumulator.5LD r,(HL) Load register r with location (HL).7LD r,(IX+d) Load register r with location (IX+d).7LD r,(IY+d) Load register r with location (IY+d)./LD r,n Load register r with value n.3LD r,r' Load register r with register r'."LD SP,HL Load SP with HL."LD SP,IX Load SP with IX."LD SP,IY Load SP with IY.LLDD Load location (DE) with location (HL), decrement DE,HL,BC.7LDDR Perform an LDD and repeat until BC=0.MLDI Load location (DE) with location (HL), incr DE,HL; decr BC.7LDIR Perform an LDI and repeat until BC=0.6NEG Negate accumulator (2's complement).NOP No operation.:OR s Logical OR of operand s and accumulator.7OTDR Perform an OUTD and repeat until B=0.6OTIR Perform an OTI and repeat until B=0.7OUT (C),r Load output port (C) with register r.8OUT (n),A Load output port (n) with accumulator.EOUTD Load output port (C) with (HL), decrement HL and B.BOUTI Load output port (C) with (HL), incr HL, decr B.,POP IX Load IX with top of stack.,POP IY Load IY with top of stack.:POP qq Load register pair qq with top of stack.%PUSH IX Load IX onto stack.%PUSH IY Load IY onto stack.3PUSH qq Load register pair qq onto stack.+RES b,m Reset bit b of operand m.)RET Return from subroutine.ARET cc Return from subroutine if condition cc is true.(RETI Return from interrupt.5RETN Return from non-maskable interrupt.0RL m Rotate left through operand m.8RLA Rotate left accumulator through carry.5RLC (HL) Rotate location (HL) left circular.7RLC (IX+d) Rotate location (IX+d) left circular.7RLC (IY+d) Rotate location (IY+d) left circular.2RLC r Rotate register r left circular.3RLCA Rotate left circular accumulator.KRLD Rotate digit left and right between accumulator and (HL).7RR m Rotate right through carry operand m.9RRA Rotate right accumulator through carry.2RRC m Rotate operand m right circular.4RRCA Rotate right circular accumulator.KRRD Rotate digit right and left between accumulator and (HL).(RST p Restart to location p.ASBC A,s Subtract operand s from accumulator with carry.?SBC HL,ss Subtract register pair ss from HL with carry.'SCF Set carry flag (C=1).-SET b,(HL) Set bit b of location (HL)./SET b,(IX+d) Set bit b of location (IX+d)./SET b,(IY+d) Set bit b of location (IY+d).*SET b,R Set bit b of register r.2SLA m Shift operand m left arithmetic.3SRA m Shift operand m right arithmetic.0SRL m Shift operand m right logical.6SUB s Subtract operand s from accumulator.9XOR s Exclusive OR operand s and accumulator.&Add with carry register pair ss to HL.(Add with carry operand s to accumulator.Add value n to accumulator.Add register r to accumulator."Add location (HL) to acccumulator.#Add location (IX+d) to accumulator.#Add location (IY+d) to accumulator.Add register pair ss to HL.Add register pair pp to IX.Add register pair rr to IY.(Logical AND of operand s to accumulator.Test bit b of location (HL).Test bit b of location (IX+d).Test bit b of location (IY+d).Test bit b of register r.7Call subroutine at location nn if condition CC is true.<LComplement carry flag.#Compare operand s with accumulator.4Comapre location (HL) and acc., decrement HL and BC,$Perform a CPD and repeat until BC=0.1Compare location (HL) and acc., incr HL, decr BC.$Perform a CPI and repeat until BC=0.(Complement accumulator (1's complement).Decimal adjust accumulator.Decrement operand m. Decrement IX. Decrement IY.Decrement register pair ss.Disable interrupts.%Decrement B and jump relative if B=0.Enable interrupts. ADC HL,ss ADC A,s ADD A,n ADD A,r ADD A,(HL)ADD A,(IX+d)ADD A,(IY+d)џКЪ/ 1Uи2a4Ѓ6BД7і+9m §:? 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